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authorAurelien Jarno <aurelien@aurel32.net>2015-07-30 22:13:26 +0200
committerAurelien Jarno <aurelien@aurel32.net>2015-08-01 09:39:37 +0200
commit3c8691f568f49bf623dcb2850464d4156d95e61b (patch)
tree088b9c46cc4dd4b428b0b37439cbe033013a9db6 /tcg/s390
parent4214a8cb7c15ec43d4b2a43ebf248b273a0f4d45 (diff)
tcg/s390x: Mask TCGMemOp appropriately for indexing
Commit 2b7ec66f fixed TCGMemOp masking following the MO_AMASK addition, but two cases were forgotten in the TCG S390 backend. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg/s390')
-rw-r--r--tcg/s390/tcg-target.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 921991ebfa..aa718eca0c 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -1390,7 +1390,7 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit *dest)
static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
TCGReg base, TCGReg index, int disp)
{
- switch (opc) {
+ switch (opc & (MO_SSIZE | MO_BSWAP)) {
case MO_UB:
tcg_out_insn(s, RXY, LLGC, data, base, index, disp);
break;
@@ -1449,7 +1449,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
TCGReg base, TCGReg index, int disp)
{
- switch (opc) {
+ switch (opc & (MO_SIZE | MO_BSWAP)) {
case MO_UB:
if (disp >= 0 && disp < 0x1000) {
tcg_out_insn(s, RX, STC, data, base, index, disp);