diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-26 11:59:55 +0100 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-25 15:29:36 +0000 |
commit | a18d783e649d761a7556f6d964efa453bb4f3a06 (patch) | |
tree | f9d535162aa84e7f32d82ab53104f1700660bbcd /tcg/riscv/tcg-target.h | |
parent | f6453695f9f87ba1974eca13322864810c90b9f0 (diff) |
tcg/riscv: Implement movcond
Implement with and without Zicond. Without Zicond, we were letting
the middle-end expand to a 5 insn sequence; better to use a branch
over a single insn.
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/riscv/tcg-target.h')
-rw-r--r-- | tcg/riscv/tcg-target.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index e0b23006c4..e9e84be9a5 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -97,7 +97,7 @@ extern bool have_zbb; #endif /* optional instructions */ -#define TCG_TARGET_HAS_movcond_i32 0 +#define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_div_i32 1 #define TCG_TARGET_HAS_rem_i32 1 #define TCG_TARGET_HAS_div2_i32 0 @@ -132,7 +132,7 @@ extern bool have_zbb; #define TCG_TARGET_HAS_setcond2 1 #define TCG_TARGET_HAS_qemu_st8_i32 0 -#define TCG_TARGET_HAS_movcond_i64 0 +#define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_div_i64 1 #define TCG_TARGET_HAS_rem_i64 1 #define TCG_TARGET_HAS_div2_i64 0 |