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authorRichard Henderson <richard.henderson@linaro.org>2021-03-14 13:32:18 -0600
committerRichard Henderson <richard.henderson@linaro.org>2021-06-13 17:42:40 -0700
commitba22783d6ef821551360890a025cd29b2444e948 (patch)
tree24c65e2f9b932d5885b04723880145ce0b0ec69a /tcg/region.c
parentd7107fc00aff819338e1d2683eabcbb2ff4ef61b (diff)
tcg: Round the tb_size default from qemu_get_host_physmem
If qemu_get_host_physmem returns an odd number of pages, then physmem / 8 will not be a multiple of the page size. The following was observed on a gitlab runner: ERROR qtest-arm/boot-serial-test - Bail out! ERROR:../util/osdep.c:80:qemu_mprotect__osdep: \ assertion failed: (!(size & ~qemu_real_host_page_mask)) Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/region.c')
-rw-r--r--tcg/region.c47
1 files changed, 21 insertions, 26 deletions
diff --git a/tcg/region.c b/tcg/region.c
index 032ed486c3..8bf6dde66a 100644
--- a/tcg/region.c
+++ b/tcg/region.c
@@ -470,26 +470,6 @@ static size_t tcg_n_regions(size_t tb_size, unsigned max_cpus)
(DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \
? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE)
-static size_t size_code_gen_buffer(size_t tb_size)
-{
- /* Size the buffer. */
- if (tb_size == 0) {
- size_t phys_mem = qemu_get_host_physmem();
- if (phys_mem == 0) {
- tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE;
- } else {
- tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8);
- }
- }
- if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) {
- tb_size = MIN_CODE_GEN_BUFFER_SIZE;
- }
- if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) {
- tb_size = MAX_CODE_GEN_BUFFER_SIZE;
- }
- return tb_size;
-}
-
#ifdef __mips__
/*
* In order to use J and JAL within the code_gen_buffer, we require
@@ -841,13 +821,29 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp)
*/
void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus)
{
- size_t page_size;
+ const size_t page_size = qemu_real_host_page_size;
size_t region_size;
size_t i;
int have_prot;
- have_prot = alloc_code_gen_buffer(size_code_gen_buffer(tb_size),
- splitwx, &error_fatal);
+ /* Size the buffer. */
+ if (tb_size == 0) {
+ size_t phys_mem = qemu_get_host_physmem();
+ if (phys_mem == 0) {
+ tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE;
+ } else {
+ tb_size = QEMU_ALIGN_DOWN(phys_mem / 8, page_size);
+ tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, tb_size);
+ }
+ }
+ if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) {
+ tb_size = MIN_CODE_GEN_BUFFER_SIZE;
+ }
+ if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) {
+ tb_size = MAX_CODE_GEN_BUFFER_SIZE;
+ }
+
+ have_prot = alloc_code_gen_buffer(tb_size, splitwx, &error_fatal);
assert(have_prot >= 0);
/* Request large pages for the buffer and the splitwx. */
@@ -862,9 +858,8 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus)
* As a result of this we might end up with a few extra pages at the end of
* the buffer; we will assign those to the last region.
*/
- region.n = tcg_n_regions(region.total_size, max_cpus);
- page_size = qemu_real_host_page_size;
- region_size = region.total_size / region.n;
+ region.n = tcg_n_regions(tb_size, max_cpus);
+ region_size = tb_size / region.n;
region_size = QEMU_ALIGN_DOWN(region_size, page_size);
/* A region must have at least 2 pages; one code, one guard */