diff options
author | Richard Henderson <rth@twiddle.net> | 2013-02-18 09:11:15 -0800 |
---|---|---|
committer | Richard Henderson <rth@twiddle.net> | 2013-04-15 20:09:54 +0200 |
commit | 1e6e9aca157bb8bc4bef60374e1f584d742e7fb2 (patch) | |
tree | 545162de5f51c2cc73ae19ee33ffff998b5815fb /tcg/ppc64 | |
parent | 027ffea9728704d9e23ae52baf51a1bcfbf34680 (diff) |
tcg-ppc64: Use getauxval for ISA detection
Glibc 2.16 includes an easy way to get feature bits previously
buried in /proc or the program startup auxiliary vector. Use it.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/ppc64')
-rw-r--r-- | tcg/ppc64/tcg-target.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index b3b38baf1f..643edf9057 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -44,8 +44,15 @@ static uint8_t *tb_ret_addr; #define GUEST_BASE 0 #endif +#ifdef CONFIG_GETAUXVAL +#include <sys/auxv.h> +static bool have_isa_2_06; +#define HAVE_ISA_2_06 have_isa_2_06 +#define HAVE_ISEL have_isa_2_06 +#else #define HAVE_ISA_2_06 0 #define HAVE_ISEL 0 +#endif #ifdef CONFIG_USE_GUEST_BASE #define TCG_GUEST_BASE_REG 30 @@ -2059,6 +2066,13 @@ static const TCGTargetOpDef ppc_op_defs[] = { static void tcg_target_init (TCGContext *s) { +#ifdef CONFIG_GETAUXVAL + unsigned long hwcap = getauxval(AT_HWCAP); + if (hwcap & PPC_FEATURE_ARCH_2_06) { + have_isa_2_06 = true; + } +#endif + tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff); tcg_regset_set32 (tcg_target_call_clobber_regs, 0, |