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authorRichard Henderson <rth@twiddle.net>2013-08-14 14:46:08 -0700
committerRichard Henderson <rth@twiddle.net>2013-09-02 09:08:29 -0700
commit32f5717f07e5f801e482052311d21a4223fc78f1 (patch)
tree4838bdf1a8a2b37730a1de0f549dd6f816d121bf /tcg/ppc64/tcg-target.h
parent3c9a8f17560794ad23889318cc42894c6e592cc3 (diff)
tcg-ppc64: Implement muluh, mulsh
Using these instead of mulu2 and muls2 lets us avoid having to argument overlap analysis in the backend. Normal register allocation will DTRT. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/ppc64/tcg-target.h')
-rw-r--r--tcg/ppc64/tcg-target.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index 0789daff83..fa4b9da093 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -118,10 +118,10 @@ typedef enum {
#define TCG_TARGET_HAS_movcond_i64 1
#define TCG_TARGET_HAS_add2_i64 1
#define TCG_TARGET_HAS_sub2_i64 1
-#define TCG_TARGET_HAS_mulu2_i64 1
-#define TCG_TARGET_HAS_muls2_i64 1
-#define TCG_TARGET_HAS_muluh_i64 0
-#define TCG_TARGET_HAS_mulsh_i64 0
+#define TCG_TARGET_HAS_mulu2_i64 0
+#define TCG_TARGET_HAS_muls2_i64 0
+#define TCG_TARGET_HAS_muluh_i64 1
+#define TCG_TARGET_HAS_mulsh_i64 1
#define TCG_AREG0 TCG_REG_R27