diff options
author | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-14 16:47:49 -0500 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-14 16:47:49 -0500 |
commit | aea6ff7fa07b046fb9f43d6262d6e34b77e8437e (patch) | |
tree | dd3043d1742273a95fa7fc5e99b8d5ffe0c710e5 /tcg/ppc64/tcg-target.c | |
parent | 9e4dd565b46749d5e6d5cf87bfd84f1917c68319 (diff) | |
parent | dd83b06ae61cfa2dc4381ab49f365bd0995fc930 (diff) |
Merge remote-tracking branch 'afaerber/qom-cpu.v5' into staging
* afaerber/qom-cpu.v5: (43 commits)
qom: Introduce CPU class
Rename CPUState -> CPUArchState
xtensa hw/: Don't use CPUState
sparc hw/: Don't use CPUState
sh4 hw/: Don't use CPUState
s390x hw/: Don't use CPUState
ppc hw/: Don't use CPUState
mips hw/: Don't use CPUState
microblaze hw/: Don't use CPUState
m68k hw/: Don't use CPUState
lm32 hw/: Don't use CPUState
i386 hw/: Don't use CPUState
cris hw/: Don't use CPUState
arm hw/: Don't use CPUState
alpha hw/: Don't use CPUState
xtensa-semi: Don't use CPUState
m68k-semi: Don't use CPUState
arm-semi: Don't use CPUState
target-xtensa: Don't overuse CPUState
target-unicore32: Don't overuse CPUState
...
Diffstat (limited to 'tcg/ppc64/tcg-target.c')
-rw-r--r-- | tcg/ppc64/tcg-target.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 44193784f2..7f723b5c2c 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -635,7 +635,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc) rbase = 0; tcg_out_tlb_read (s, r0, r1, r2, addr_reg, s_bits, - offsetof (CPUState, tlb_table[mem_index][0].addr_read)); + offsetof (CPUArchState, tlb_table[mem_index][0].addr_read)); tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1) | CMP_L); @@ -782,7 +782,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc) rbase = 0; tcg_out_tlb_read (s, r0, r1, r2, addr_reg, opc, - offsetof (CPUState, tlb_table[mem_index][0].addr_write)); + offsetof (CPUArchState, tlb_table[mem_index][0].addr_write)); tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1) | CMP_L); |