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authorAndreas Färber <afaerber@suse.de>2012-05-09 19:26:58 +0200
committerAnthony Liguori <aliguori@us.ibm.com>2012-05-09 13:59:19 -0500
commita082615b0752e113e40537e7f820ffb4bbb15750 (patch)
tree7a37863a332c4c8526f248e101fbf309c1234d90 /tcg/ppc/tcg-target.c
parentd831fdb0517118e8029316495cb272cbb8910800 (diff)
tcg/ppc: Clobber r5 for 64-bit qemu_ld
This accounts for the additional addr_reg2 register. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'tcg/ppc/tcg-target.c')
-rw-r--r--tcg/ppc/tcg-target.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
index b4e0466083..20888e2e91 100644
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -244,6 +244,9 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
tcg_regset_set32(ct->u.regs, 0, 0xffffffff);
tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3);
tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4);
+#if TARGET_LONG_BITS == 64
+ tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5);
+#endif
break;
case 'K': /* qemu_st[8..32] constraint */
ct->ct |= TCG_CT_REG;