diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 17:50:09 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:23:49 +0100 |
| commit | 52bf3398c3a2f51d3eaf8fd30dafcdc0cc7fc571 (patch) | |
| tree | 24cfde0cbd7ce893b8b736cf42c92eaa0592148a /tcg/mips | |
| parent | 379afdff47556f01e75ce2caffd7ae9efa4f1214 (diff) | |
tcg: Split out tcg_out_ext32s
We will need a backend interface for performing 32-bit sign-extend.
Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/mips')
| -rw-r--r-- | tcg/mips/tcg-target.c.inc | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index 220060c821..c57ccb6b3d 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -574,6 +574,12 @@ static void tcg_out_ext16u(TCGContext *s, TCGReg rd, TCGReg rs) tcg_out_opc_imm(s, OPC_ANDI, rd, rs, 0xffff); } +static void tcg_out_ext32s(TCGContext *s, TCGReg rd, TCGReg rs) +{ + tcg_debug_assert(TCG_TARGET_REG_BITS == 64); + tcg_out_opc_sa(s, OPC_SLL, rd, rs, 0); +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { @@ -1313,7 +1319,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) /* delay slot */ if (TCG_TARGET_REG_BITS == 64 && l->type == TCG_TYPE_I32) { /* we always sign-extend 32-bit loads */ - tcg_out_opc_sa(s, OPC_SLL, v0, TCG_REG_V0, 0); + tcg_out_ext32s(s, v0, TCG_REG_V0); } else { tcg_out_opc_reg(s, OPC_OR, v0, TCG_REG_V0, TCG_REG_ZERO); } @@ -2287,10 +2293,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_extrh_i64_i32: tcg_out_dsra(s, a0, a1, 32); break; - case INDEX_op_ext32s_i64: case INDEX_op_ext_i32_i64: case INDEX_op_extrl_i64_i32: - tcg_out_opc_sa(s, OPC_SLL, a0, a1, 0); + tcg_out_ext32s(s, a0, a1); break; case INDEX_op_ext32u_i64: case INDEX_op_extu_i32_i64: @@ -2440,6 +2445,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_ext8u_i64: case INDEX_op_ext16s_i32: case INDEX_op_ext16s_i64: + case INDEX_op_ext32s_i64: default: g_assert_not_reached(); } |