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authorRichard Henderson <richard.henderson@linaro.org>2022-11-07 10:42:56 +1100
committerRichard Henderson <richard.henderson@linaro.org>2023-05-16 16:30:25 -0700
commit12fde9bcdb52118495d10c32ed375679f23e323c (patch)
treeaf2fc03fc6bf402cad84ec11be6799fd0a373f8f /tcg/mips/tcg-target.h
parent7b8801071951c55dc506c1fca8b40ba292a28d6e (diff)
tcg: Add INDEX_op_qemu_{ld,st}_i128
Add opcodes for backend support for 128-bit memory operations. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/mips/tcg-target.h')
-rw-r--r--tcg/mips/tcg-target.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 47088af9cb..7277a117ef 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -204,6 +204,8 @@ extern bool use_mips32r2_instructions;
#define TCG_TARGET_HAS_ext16u_i64 0 /* andi rt, rs, 0xffff */
#endif
+#define TCG_TARGET_HAS_qemu_ldst_i128 0
+
#define TCG_TARGET_DEFAULT_MO 0
#define TCG_TARGET_NEED_LDST_LABELS