diff options
| author | Pranith Kumar <bobby.prani@gmail.com> | 2017-08-29 02:33:11 -0400 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2017-09-05 12:56:40 -0700 |
| commit | 71650df7b0ee0600308810a267a123b971b3d533 (patch) | |
| tree | 4ce849c8d71dfcedd8982a2e3c93c778684019df /tcg/mips/tcg-target.h | |
| parent | a46c1244a0d65d5f37fc12e4d42f2479eac87b52 (diff) | |
tcg: Add tcg target default memory ordering
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-Id: <20170829063313.10237-3-bobby.prani@gmail.com>
[rth: Dropped ia64 hunk]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/mips/tcg-target.h')
| -rw-r--r-- | tcg/mips/tcg-target.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index d75cb63ed3..e9558d15bc 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -206,4 +206,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop) cacheflush ((void *)start, stop-start, ICACHE); } +#define TCG_TARGET_DEFAULT_MO (0) + #endif |