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authorAurelien Jarno <aurelien@aurel32.net>2012-09-22 23:08:38 +0200
committerAurelien Jarno <aurelien@aurel32.net>2012-09-26 00:31:16 +0200
commit8f06bf693dec29642255adcc2828bc6b7daa83d9 (patch)
tree50c095abf38cf2d73e278725fe773e72e1a15653 /tcg/mips/tcg-target.h
parentd3e8f95753114a827f9cd8e819b1d5cc8333f76b (diff)
tcg/mips: fix MIPS32(R2) detection
Fix the MIPS32(R2) cpu detection so that it also works with -march=octeon. Thanks to Andrew Pinski for the hint. Cc: Andrew Pinski <apinski@cavium.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg/mips/tcg-target.h')
-rw-r--r--tcg/mips/tcg-target.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index d147e70eb1..7020d65845 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -88,16 +88,16 @@ typedef enum {
#define TCG_TARGET_HAS_nand_i32 0
/* optional instructions only implemented on MIPS4, MIPS32 and Loongson 2 */
-#if defined(_MIPS_ARCH_MIPS4) || defined(_MIPS_ARCH_MIPS32) || \
- defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_LOONGSON2E) || \
- defined(_MIPS_ARCH_LOONGSON2F)
+#if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \
+ defined(_MIPS_ARCH_LOONGSON2E) || defined(_MIPS_ARCH_LOONGSON2F) || \
+ defined(_MIPS_ARCH_MIPS4)
#define TCG_TARGET_HAS_movcond_i32 1
#else
#define TCG_TARGET_HAS_movcond_i32 0
#endif
/* optional instructions only implemented on MIPS32R2 */
-#ifdef _MIPS_ARCH_MIPS32R2
+#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
#define TCG_TARGET_HAS_bswap16_i32 1
#define TCG_TARGET_HAS_bswap32_i32 1
#define TCG_TARGET_HAS_rot_i32 1