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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 16:25:22 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:21:30 +0100 |
| commit | 379afdff47556f01e75ce2caffd7ae9efa4f1214 (patch) | |
| tree | 5ef028391e8d09a07713234138ccd6ee6420e1ef /tcg/mips/tcg-target.c.inc | |
| parent | 753e42eada5c790bb3727c262f2e368e81cc788f (diff) | |
tcg: Split out tcg_out_ext16u
We will need a backend interface for performing 16-bit zero-extend.
Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/mips/tcg-target.c.inc')
| -rw-r--r-- | tcg/mips/tcg-target.c.inc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index 9d305b9cf4..220060c821 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -569,6 +569,11 @@ static void tcg_out_ext16s(TCGContext *s, TCGType type, TCGReg rd, TCGReg rs) tcg_out_opc_reg(s, OPC_SEH, rd, TCG_REG_ZERO, rs); } +static void tcg_out_ext16u(TCGContext *s, TCGReg rd, TCGReg rs) +{ + tcg_out_opc_imm(s, OPC_ANDI, rd, rs, 0xffff); +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { |