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authorPaolo Bonzini <pbonzini@redhat.com>2015-05-05 09:18:22 +0200
committerAlexander Graf <agraf@suse.de>2015-06-03 23:56:56 +0200
commit006f8638c62bca2b0caf609485f47fa5e14d8a3c (patch)
tree45348a37b0929c631db152db3416901c5ddc7d39 /tcg/arm
parent5a58e884d1d9905a835de2889c8cd73327fe2a94 (diff)
tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS
This will be used to size the TLB when more than 8 MMU modes are used by the target. Limitations come from the limited size of the immediate fields (which sometimes, as in the case of Aarch64, extend to instructions that shift the immediate). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1424436345-37924-2-git-send-email-pbonzini@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'tcg/arm')
-rw-r--r--tcg/arm/tcg-target.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 1c719e2862..6559f80b71 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -27,6 +27,7 @@
#undef TCG_TARGET_STACK_GROWSUP
#define TCG_TARGET_INSN_UNIT_SIZE 4
+#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
typedef enum {
TCG_REG_R0 = 0,