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authorRichard Henderson <richard.henderson@linaro.org>2020-12-09 13:58:39 -0600
committerRichard Henderson <richard.henderson@linaro.org>2021-01-07 05:09:06 -1000
commit07ce0b05300de5bc8f1932a4cfbe38f3323e5ab1 (patch)
treea22f2b213b2cb96c8e0e30c69bca9edb00b678bc /tcg/arm
parentd2ef1b83a7a2047e0e36d7b62b3a5d151ab958f5 (diff)
tcg: Introduce INDEX_op_qemu_st8_i32
Enable this on i386 to restrict the set of input registers for an 8-bit store, as required by the architecture. This removes the last use of scratch registers for user-only mode. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/arm')
-rw-r--r--tcg/arm/tcg-target.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index f1955ce4ac..1e18fefd0e 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -126,6 +126,7 @@ extern bool use_idiv_instructions;
#define TCG_TARGET_HAS_rem_i32 0
#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_direct_jump 0
+#define TCG_TARGET_HAS_qemu_st8_i32 0
enum {
TCG_AREG0 = TCG_REG_R6,