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authorRichard Henderson <richard.henderson@linaro.org>2019-05-07 10:33:44 -0700
committerRichard Henderson <richard.henderson@linaro.org>2019-06-10 07:03:42 -0700
commit43b3952dea0f763ceeaa2f119c473b5cc6d29c90 (patch)
tree90697278e6aefd0b91858c403ddb5670f6bdf053 /tcg/arm
parent057b6e370b0947613b0e829c0bb0ddf960003d15 (diff)
tcg/arm: Remove mostly unreachable tlb special case
There was nothing armv7 specific about the bic+cmp sequence, however looking at the set of guests more closely shows that the 8-bit immediate operand for the bic can only be satisfied with one guest in tree: baseline m-profile -- 10-bit pages with aligned 4-byte memory ops. Therefore it does not seem useful to keep this path. Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/arm')
-rw-r--r--tcg/arm/tcg-target.inc.c23
1 files changed, 12 insertions, 11 deletions
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index 276e843627..ece88dc2eb 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -1290,19 +1290,20 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R1,
offsetof(CPUTLBEntry, addend));
- /* Check alignment, check comparators. */
- if (use_armv7_instructions) {
+ /*
+ * Check alignment, check comparators.
+ * Do this in no more than 3 insns. Use MOVW for v7, if possible,
+ * to reduce the number of sequential conditional instructions.
+ * Almost all guests have at least 4k pages, which means that we need
+ * to clear at least 9 bits even for an 8-byte memory, which means it
+ * isn't worth checking for an immediate operand for BIC.
+ */
+ if (use_armv7_instructions && TARGET_PAGE_BITS <= 16) {
tcg_target_ulong mask = ~(TARGET_PAGE_MASK | ((1 << a_bits) - 1));
- int rot = encode_imm(mask);
- if (rot >= 0) {
- tcg_out_dat_imm(s, COND_AL, ARITH_BIC, TCG_REG_TMP, addrlo,
- rotl(mask, rot) | (rot << 7));
- } else {
- tcg_out_movi32(s, COND_AL, TCG_REG_TMP, mask);
- tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP,
- addrlo, TCG_REG_TMP, 0);
- }
+ tcg_out_movi32(s, COND_AL, TCG_REG_TMP, mask);
+ tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP,
+ addrlo, TCG_REG_TMP, 0);
tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, TCG_REG_R2, TCG_REG_TMP, 0);
} else {
if (a_bits) {