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authorRichard Henderson <rth@twiddle.net>2017-07-28 11:24:17 -0700
committerRichard Henderson <rth@twiddle.net>2017-08-03 10:56:44 -0700
commitca671de8af96798e0f493378240034620a3a04ee (patch)
tree6c3a4b63bccc9dc8c49c925df13c908401ec28fa /tcg/arm
parentaaaec6acad7cf97372d48c1b09126a09697519c8 (diff)
tcg/arm: Fix runtime overalignment test
Patch 85aa80813dd changed the IF emitting the TST instruction, but failed to change the ?: converting CMP to CMPEQ, so the result of the TST is ignored. Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/arm')
-rw-r--r--tcg/arm/tcg-target.inc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index d1793ec77d..37efcf06af 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -1223,7 +1223,7 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
/* Load the tlb addend. */
tcg_out_ld32_12(s, COND_AL, TCG_REG_R2, TCG_REG_R2, add_off);
- tcg_out_dat_reg(s, (s_bits ? COND_EQ : COND_AL), ARITH_CMP, 0,
+ tcg_out_dat_reg(s, (a_bits ? COND_EQ : COND_AL), ARITH_CMP, 0,
TCG_REG_R0, TCG_REG_TMP, SHIFT_IMM_LSL(TARGET_PAGE_BITS));
if (TARGET_LONG_BITS == 64) {