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authorPeter Maydell <peter.maydell@linaro.org>2019-11-11 16:54:16 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-11-11 16:54:16 +0000
commit9f2ce35dfa4ea4a31dbb765dd02bed2500891887 (patch)
tree9b8107421d49a99951c11859fcb6c2755473e63c /tcg/aarch64/tcg-target.opc.h
parentb626eb031a33886a06a153b8715213a2b5816c1c (diff)
parentcb974c95df0e1c9e73a37facd3e13894bd3eedc2 (diff)
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20191111' into staging
Remove no-longer-true statement that TCG is BSD-licensed # gpg: Signature made Mon 11 Nov 2019 15:24:06 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20191111: tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing tcg/ppc/tcg-target.opc.h: Add copyright/license tcg/i386/tcg-target.opc.h: Add copyright/license tcg/aarch64/tcg-target.opc.h: Add copyright/license Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/aarch64/tcg-target.opc.h')
-rw-r--r--tcg/aarch64/tcg-target.opc.h15
1 files changed, 12 insertions, 3 deletions
diff --git a/tcg/aarch64/tcg-target.opc.h b/tcg/aarch64/tcg-target.opc.h
index 59e1d3f7f7..26bfd9c460 100644
--- a/tcg/aarch64/tcg-target.opc.h
+++ b/tcg/aarch64/tcg-target.opc.h
@@ -1,5 +1,14 @@
-/* Target-specific opcodes for host vector expansion. These will be
- emitted by tcg_expand_vec_op. For those familiar with GCC internals,
- consider these to be UNSPEC with names. */
+/*
+ * Copyright (c) 2019 Linaro
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or
+ * (at your option) any later version.
+ *
+ * See the COPYING file in the top-level directory for details.
+ *
+ * Target-specific opcodes for host vector expansion. These will be
+ * emitted by tcg_expand_vec_op. For those familiar with GCC internals,
+ * consider these to be UNSPEC with names.
+ */
DEF(aa64_sshl_vec, 1, 2, 0, IMPLVEC)