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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-09-12 22:54:32 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-12 22:54:32 +0100 |
| commit | 3d9f371b01067d9cec4d592920013012119397c8 (patch) | |
| tree | 76855d818f531ca894b492ee90fe97636ea808b7 /target | |
| parent | c47edb8dda0660180f86df4defae2a1f60e345db (diff) | |
| parent | c17a386b6afe608086aa4d260e29662865680b7f (diff) | |
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-fixes-100920-1' into staging
Various misc and testing fixes:
- Expand CODING_STYLE.rst a little more
- usb-host build fix
- allow check-softfloat unit tests without TCG
- simplify mips imm_branch so compiler isn't confused
- mark ppc64abi32 for deprecation
- more compiler soothing in pch_rev_id
- allow acceptance to skip missing binaries
- more a bunch of plugins to contrib
# gpg: Signature made Thu 10 Sep 2020 10:51:05 BST
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44
* remotes/stsquad/tags/pull-testing-fixes-100920-1:
plugins: move the more involved plugins to contrib
tests/acceptance: Add Test.fetch_asset(cancel_on_missing=True)
tests: bump avocado version
hw/i386: make explicit clearing of pch_rev_id
configure: don't enable ppc64abi32-linux-user by default
docs/system/deprecated: mark ppc64abi32-linux-user for deprecation
target/mips: simplify gen_compute_imm_branch logic
tests/meson.build: fp tests don't need CONFIG_TCG
usb-host: restrict workaround to new libusb versions
CODING_STYLE.rst: flesh out our naming conventions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/mips/translate.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 899b90ae0f..398edf7289 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20028,8 +20028,7 @@ static void gen_pool32axf_nanomips_insn(CPUMIPSState *env, DisasContext *ctx) static void gen_compute_imm_branch(DisasContext *ctx, uint32_t opc, int rt, int32_t imm, int32_t offset) { - TCGCond cond; - int bcond_compute = 0; + TCGCond cond = TCG_COND_ALWAYS; TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); @@ -20046,7 +20045,6 @@ static void gen_compute_imm_branch(DisasContext *ctx, uint32_t opc, /* Treat as NOP */ goto out; } else { - bcond_compute = 1; cond = TCG_COND_EQ; } break; @@ -20065,7 +20063,6 @@ static void gen_compute_imm_branch(DisasContext *ctx, uint32_t opc, tcg_gen_shri_tl(t0, t0, imm); tcg_gen_andi_tl(t0, t0, 1); tcg_gen_movi_tl(t1, 0); - bcond_compute = 1; if (opc == NM_BBEQZC) { cond = TCG_COND_EQ; } else { @@ -20080,7 +20077,6 @@ static void gen_compute_imm_branch(DisasContext *ctx, uint32_t opc, } else if (rt == 0 && imm != 0) { /* Unconditional branch */ } else { - bcond_compute = 1; cond = TCG_COND_NE; } break; @@ -20088,24 +20084,20 @@ static void gen_compute_imm_branch(DisasContext *ctx, uint32_t opc, if (rt == 0 && imm == 0) { /* Unconditional branch */ } else { - bcond_compute = 1; cond = TCG_COND_GE; } break; case NM_BLTIC: - bcond_compute = 1; cond = TCG_COND_LT; break; case NM_BGEIUC: if (rt == 0 && imm == 0) { /* Unconditional branch */ } else { - bcond_compute = 1; cond = TCG_COND_GEU; } break; case NM_BLTIUC: - bcond_compute = 1; cond = TCG_COND_LTU; break; default: @@ -20118,7 +20110,7 @@ static void gen_compute_imm_branch(DisasContext *ctx, uint32_t opc, clear_branch_hflags(ctx); ctx->base.is_jmp = DISAS_NORETURN; - if (bcond_compute == 0) { + if (cond == TCG_COND_ALWAYS) { /* Uncoditional compact branch */ gen_goto_tb(ctx, 0, ctx->btarget); } else { |