diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-11-04 16:39:12 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-06-05 09:05:53 -0700 |
| commit | bc3f14a9ed777ddab8c8915a9804f9b3ca90839d (patch) | |
| tree | 4f76b4bcb32b20d2e4e481025bd0abb597236f31 /target | |
| parent | d6ff1ccb45f9b228e20f74f6e6c801c88a2885b2 (diff) | |
target/sparc: Implement FPADD64, FPSUB64
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/sparc/insns.decode | 2 | ||||
| -rw-r--r-- | target/sparc/translate.c | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index febd1a4a13..70ca41a69a 100644 --- a/target/sparc/insns.decode +++ b/target/sparc/insns.decode @@ -441,10 +441,12 @@ FCMPEq 10 000 cc:2 110101 ..... 0 0101 0111 ..... \ FPADD16s 10 ..... 110110 ..... 0 0101 0001 ..... @r_r_r FPADD32 10 ..... 110110 ..... 0 0101 0010 ..... @d_d_d FPADD32s 10 ..... 110110 ..... 0 0101 0011 ..... @r_r_r + FPADD64 10 ..... 110110 ..... 0 0100 0010 ..... @d_d_d FPSUB16 10 ..... 110110 ..... 0 0101 0100 ..... @d_d_d FPSUB16s 10 ..... 110110 ..... 0 0101 0101 ..... @r_r_r FPSUB32 10 ..... 110110 ..... 0 0101 0110 ..... @d_d_d FPSUB32s 10 ..... 110110 ..... 0 0101 0111 ..... @r_r_r + FPSUB64 10 ..... 110110 ..... 0 0100 0110 ..... @d_d_d FNORd 10 ..... 110110 ..... 0 0110 0010 ..... @d_d_d FNORs 10 ..... 110110 ..... 0 0110 0011 ..... @r_r_r diff --git a/target/sparc/translate.c b/target/sparc/translate.c index c3956f489b..48cab59c07 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -4912,6 +4912,9 @@ TRANS(FHADDd, VIS3, do_ddd, a, gen_op_fhaddd) TRANS(FHSUBd, VIS3, do_ddd, a, gen_op_fhsubd) TRANS(FNHADDd, VIS3, do_ddd, a, gen_op_fnhaddd) +TRANS(FPADD64, VIS3B, do_ddd, a, tcg_gen_add_i64) +TRANS(FPSUB64, VIS3B, do_ddd, a, tcg_gen_sub_i64) + static bool do_rdd(DisasContext *dc, arg_r_r_r *a, void (*func)(TCGv, TCGv_i64, TCGv_i64)) { |