diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2020-08-24 20:13:45 -0700 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2020-09-01 07:43:35 -0700 |
commit | 52065d8f4689e88ac2e4b9f49b64399a3e80f40a (patch) | |
tree | ef2dd74ace8c161aa8c254a8ce440b3ea1a4cc0c /target | |
parent | 9df297a2d84a0c452567ae6c2be2b5c42b8a0931 (diff) |
target/microblaze: Convert dec_stream to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/microblaze/insns.decode | 6 | ||||
-rw-r--r-- | target/microblaze/translate.c | 58 |
2 files changed, 52 insertions, 12 deletions
diff --git a/target/microblaze/insns.decode b/target/microblaze/insns.decode index 43c9e16819..fb0f0e6838 100644 --- a/target/microblaze/insns.decode +++ b/target/microblaze/insns.decode @@ -159,6 +159,9 @@ flt 010110 ..... ..... ----- 0101 000 0000 @typea0 fint 010110 ..... ..... ----- 0110 000 0000 @typea0 fsqrt 010110 ..... ..... 00000 0111 000 0000 @typea0 +get 011011 rd:5 00000 0 ctrl:5 000000 imm:4 +getd 010011 rd:5 00000 rb:5 0 ctrl:5 00000 + idiv 010010 ..... ..... ..... 000 0000 0000 @typea idivu 010010 ..... ..... ..... 000 0000 0010 @typea @@ -201,6 +204,9 @@ pcmpbf 100000 ..... ..... ..... 100 0000 0000 @typea pcmpeq 100010 ..... ..... ..... 100 0000 0000 @typea pcmpne 100011 ..... ..... ..... 100 0000 0000 @typea +put 011011 00000 ra:5 1 ctrl:5 000000 imm:4 +putd 010011 00000 ra:5 rb:5 1 ctrl:5 00000 + rsub 000001 ..... ..... ..... 000 0000 0000 @typea rsubc 000011 ..... ..... ..... 000 0000 0000 @typea rsubk 000101 ..... ..... ..... 000 0000 0000 @typea diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 582f5a1577..2c87d671ae 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1560,33 +1560,68 @@ static void dec_null(DisasContext *dc) } /* Insns connected to FSL or AXI stream attached devices. */ -static void dec_stream(DisasContext *dc) +static bool do_get(DisasContext *dc, int rd, int rb, int imm, int ctrl) { TCGv_i32 t_id, t_ctrl; - int ctrl; if (trap_userspace(dc, true)) { - return; + return true; } t_id = tcg_temp_new_i32(); - if (dc->type_b) { - tcg_gen_movi_i32(t_id, dc->imm & 0xf); - ctrl = dc->imm >> 10; + if (rb) { + tcg_gen_andi_i32(t_id, cpu_R[rb], 0xf); } else { - tcg_gen_andi_i32(t_id, cpu_R[dc->rb], 0xf); - ctrl = dc->imm >> 5; + tcg_gen_movi_i32(t_id, imm); } t_ctrl = tcg_const_i32(ctrl); + gen_helper_get(reg_for_write(dc, rd), t_id, t_ctrl); + tcg_temp_free_i32(t_id); + tcg_temp_free_i32(t_ctrl); + return true; +} + +static bool trans_get(DisasContext *dc, arg_get *arg) +{ + return do_get(dc, arg->rd, 0, arg->imm, arg->ctrl); +} + +static bool trans_getd(DisasContext *dc, arg_getd *arg) +{ + return do_get(dc, arg->rd, arg->rb, 0, arg->ctrl); +} + +static bool do_put(DisasContext *dc, int ra, int rb, int imm, int ctrl) +{ + TCGv_i32 t_id, t_ctrl; + + if (trap_userspace(dc, true)) { + return true; + } - if (dc->rd == 0) { - gen_helper_put(t_id, t_ctrl, cpu_R[dc->ra]); + t_id = tcg_temp_new_i32(); + if (rb) { + tcg_gen_andi_i32(t_id, cpu_R[rb], 0xf); } else { - gen_helper_get(cpu_R[dc->rd], t_id, t_ctrl); + tcg_gen_movi_i32(t_id, imm); } + + t_ctrl = tcg_const_i32(ctrl); + gen_helper_put(t_id, t_ctrl, reg_for_read(dc, ra)); tcg_temp_free_i32(t_id); tcg_temp_free_i32(t_ctrl); + return true; +} + +static bool trans_put(DisasContext *dc, arg_put *arg) +{ + return do_put(dc, arg->ra, 0, arg->imm, arg->ctrl); +} + +static bool trans_putd(DisasContext *dc, arg_putd *arg) +{ + return do_put(dc, arg->ra, arg->rb, 0, arg->ctrl); } static struct decoder_info { @@ -1596,7 +1631,6 @@ static struct decoder_info { }; void (*dec)(DisasContext *dc); } decinfo[] = { - {DEC_STREAM, dec_stream}, {{0, 0}, dec_null} }; |