diff options
| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-12-08 12:35:26 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-01-19 12:28:59 +0100 |
| commit | 24128132866d8486e8f0b4bdf647ced03b5ef522 (patch) | |
| tree | 9f31d3926606f3d4f3e633aec76bf4d4e3243d60 /target | |
| parent | 8e98c27daacba2fac0cb868f905489b9a744a152 (diff) | |
target/arm: Ensure icount is enabled when emulating INST_RETIRED
pmu_init() register its event checking the pm_event::supported()
handler. For INST_RETIRED, the event is only registered and the
bit enabled in the PMU Common Event Identification register when
icount is enabled as ICOUNT_PRECISE.
PMU events are TCG-only, hardware accelerators handle them
directly. Unfortunately we register the events in non-TCG builds,
leading to linking error such:
ld: Undefined symbols:
_icount_to_ns, referenced from:
_instructions_ns_per in target_arm_helper.c.o
clang: error: linker command failed with exit code 1 (use -v to see invocation)
As a kludge, give a hint to the compiler by asserting the
pm_event::get_count() and pm_event::ns_per_count() handler will
only be called under this icount mode.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231208113529.74067-5-philmd@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/helper.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 49665bb763..e068d35383 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -954,11 +954,13 @@ static bool instructions_supported(CPUARMState *env) static uint64_t instructions_get_count(CPUARMState *env) { + assert(icount_enabled() == ICOUNT_PRECISE); return (uint64_t)icount_get_raw(); } static int64_t instructions_ns_per(uint64_t icount) { + assert(icount_enabled() == ICOUNT_PRECISE); return icount_to_ns((int64_t)icount); } #endif |