diff options
author | Víctor Colombo <victor.colombo@eldorado.org.br> | 2022-05-04 18:05:37 -0300 |
---|---|---|
committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-05-05 15:36:17 -0300 |
commit | ca241959cd824e1feeabed4948e2c754d1e2b635 (patch) | |
tree | dffc7a4c6e43093f2717acb89a70d24343ba9462 /target | |
parent | da806a6c63c8a62700fcb7bc09ba908f0f5e5648 (diff) |
target/ppc: Remove msr_ts macro
msr_ts macro hides the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-19-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target')
-rw-r--r-- | target/ppc/cpu.h | 2 | ||||
-rw-r--r-- | target/ppc/kvm.c | 4 | ||||
-rw-r--r-- | target/ppc/machine.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 74a3c01f99..5ac7d7d68f 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -354,6 +354,7 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 */ #define MSR_LE 0 /* Little-endian mode 1 hflags */ +FIELD(MSR, TS, MSR_TS0, 2) FIELD(MSR, CM, MSR_CM, 1) FIELD(MSR, GS, MSR_GS, 1) FIELD(MSR, POW, MSR_POW, 1) @@ -494,7 +495,6 @@ FIELD(MSR, LE, MSR_LE, 1) #define msr_hv (0) #endif #define msr_de ((env->msr >> MSR_DE) & 1) -#define msr_ts ((env->msr >> MSR_TS1) & 3) #define DBCR0_ICMP (1 << 27) #define DBCR0_BRT (1 << 26) diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index db3a92869c..6eed466f80 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -974,7 +974,7 @@ int kvm_arch_put_registers(CPUState *cs, int level) } #ifdef TARGET_PPC64 - if (msr_ts) { + if (FIELD_EX64(env->msr, MSR, TS)) { for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) { kvm_set_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]); } @@ -1282,7 +1282,7 @@ int kvm_arch_get_registers(CPUState *cs) } #ifdef TARGET_PPC64 - if (msr_ts) { + if (FIELD_EX64(env->msr, MSR, TS)) { for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) { kvm_get_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]); } diff --git a/target/ppc/machine.c b/target/ppc/machine.c index e673944597..7104a5c67e 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -417,7 +417,7 @@ static bool tm_needed(void *opaque) { PowerPCCPU *cpu = opaque; CPUPPCState *env = &cpu->env; - return msr_ts; + return FIELD_EX64(env->msr, MSR, TS); } static const VMStateDescription vmstate_tm = { |