diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2024-03-01 10:41:07 -1000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-03-05 13:22:56 +0000 |
| commit | a0ff4a879cd3198adb4213653d51a39d053ef2d6 (patch) | |
| tree | 2dbb34a34b978b0e7900f6ecae30df37953c7b4a /target | |
| parent | a1a85a9502b5d0011320fdf490c1d6bc2f8fdc79 (diff) | |
accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull
Allow the target to set tlb flags to apply to all of the
comparators. Remove MemTxAttrs.byte_swap, as the bit is
not relevant to memory transactions, only the page mapping.
Adjust target/sparc to set TLB_BSWAP directly.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240301204110.656742-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/sparc/mmu_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 5170a668bb..e7b1997d54 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -580,7 +580,7 @@ static int get_physical_address_data(CPUSPARCState *env, CPUTLBEntryFull *full, int do_fault = 0; if (TTE_IS_IE(env->dtlb[i].tte)) { - full->attrs.byte_swap = true; + full->tlb_fill_flags |= TLB_BSWAP; } /* access ok? */ |