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authorPeter Maydell <peter.maydell@linaro.org>2020-03-31 11:20:21 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-03-31 11:20:21 +0100
commit2a95551e8b1456aa53ce54fac573df18809340a6 (patch)
tree2516c9dde9e5d07cc8baf28d1f0e1ee3ca50f0e2 /target
parent83019e81d1002650947c3e992508cdab7b89e3f5 (diff)
parentb412378785c1bd95e3461c1373dd8938bc54fb4e (diff)
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200330' into staging
Improve PIE and other linkage Fix for decodetree vs Python3 floor division operator Fix i386 INDEX_op_dup2_vec expansion Fix loongson multimedia condition instructions # gpg: Signature made Tue 31 Mar 2020 04:50:15 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20200330: decodetree: Use Python3 floor division operator tcg/i386: Fix INDEX_op_dup2_vec target/mips: Fix loongson multimedia condition instructions configure: Support -static-pie if requested configure: Override the os default with --disable-pie configure: Unnest detection of -z,relro and -z,now configure: Always detect -no-pie toolchain support configure: Do not force pie=no for non-x86 tcg: Remove softmmu code_gen_buffer fixed address configure: Drop adjustment of textseg Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/mips/translate.c35
1 files changed, 31 insertions, 4 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index d745bd2803..25b595a17d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5529,6 +5529,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
{
uint32_t opc, shift_max;
TCGv_i64 t0, t1;
+ TCGCond cond;
opc = MASK_LMI(ctx->opcode);
switch (opc) {
@@ -5862,14 +5863,39 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
case OPC_SEQU_CP2:
case OPC_SEQ_CP2:
+ cond = TCG_COND_EQ;
+ goto do_cc_cond;
+ break;
case OPC_SLTU_CP2:
+ cond = TCG_COND_LTU;
+ goto do_cc_cond;
+ break;
case OPC_SLT_CP2:
+ cond = TCG_COND_LT;
+ goto do_cc_cond;
+ break;
case OPC_SLEU_CP2:
+ cond = TCG_COND_LEU;
+ goto do_cc_cond;
+ break;
case OPC_SLE_CP2:
- /*
- * ??? Document is unclear: Set FCC[CC]. Does that mean the
- * FD field is the CC field?
- */
+ cond = TCG_COND_LE;
+ do_cc_cond:
+ {
+ int cc = (ctx->opcode >> 8) & 0x7;
+ TCGv_i64 t64 = tcg_temp_new_i64();
+ TCGv_i32 t32 = tcg_temp_new_i32();
+
+ tcg_gen_setcond_i64(cond, t64, t0, t1);
+ tcg_gen_extrl_i64_i32(t32, t64);
+ tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
+ get_fp_bit(cc), 1);
+
+ tcg_temp_free_i32(t32);
+ tcg_temp_free_i64(t64);
+ }
+ goto no_rd;
+ break;
default:
MIPS_INVAL("loongson_cp2");
generate_exception_end(ctx, EXCP_RI);
@@ -5878,6 +5904,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
gen_store_fpr64(ctx, t0, rd);
+no_rd:
tcg_temp_free_i64(t0);
tcg_temp_free_i64(t1);
}