diff options
| author | Maksim Davydov <davydov-max@yandex-team.ru> | 2023-05-25 00:37:48 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-05-25 09:30:52 +0200 |
| commit | fb00aa61267c8b9c57a2d1a1fa1e336d02e3bcd1 (patch) | |
| tree | 39c7a39b8b61124660f7efc4a33cf65f9a60f656 /target | |
| parent | 886c0453cbf10eebd42a9ccf89c3e46eb389c357 (diff) | |
target/i386: EPYC-Rome model without XSAVES
Based on the kernel commit "b0563468ee x86/CPU/AMD: Disable XSAVES on
AMD family 0x17", host system with EPYC-Rome can clear XSAVES capability
bit. In another words, EPYC-Rome host without XSAVES can occur. Thus, we
need an EPYC-Rome cpu model (without this feature) that matches the
solution of fixing this erratum
Signed-off-by: Maksim Davydov <davydov-max@yandex-team.ru>
Message-Id: <20230524213748.8918-1-davydov-max@yandex-team.ru>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/i386/cpu.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index a61cd6d99d..1242bd541a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4466,6 +4466,16 @@ static const X86CPUDefinition builtin_x86_defs[] = { }, .cache_info = &epyc_rome_v3_cache_info }, + { + .version = 4, + .props = (PropValue[]) { + /* Erratum 1386 */ + { "model-id", + "AMD EPYC-Rome-v4 Processor (no XSAVES)" }, + { "xsaves", "off" }, + { /* end of list */ } + }, + }, { /* end of list */ } } }, |