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authorPeter Maydell <peter.maydell@linaro.org>2024-01-09 14:43:51 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-01-09 14:43:51 +0000
commit2e9b1e50bdf61cadff91ba16f6fc92ef4317803f (patch)
tree9d121ee527cc54000fa05dfc1c0b797fc7fbf7c8 /target
parentf11440b4261fd5db888c300936c0c4537543aed6 (diff)
target/arm: Treat LDTR* and STTR* as LDR/STR when NV, NV1 is 1, 1
FEAT_NV requires (per I_JKLJK) that when HCR_EL2.{NV,NV1} is {1,1} the unprivileged-access instructions LDTR, STTR etc behave as normal loads and stores. Implement the check that handles this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Miguel Luis <miguel.luis@oracle.com>
Diffstat (limited to 'target')
-rw-r--r--target/arm/tcg/hflags.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/target/arm/tcg/hflags.c b/target/arm/tcg/hflags.c
index f33c0a1274..8f254bf9cc 100644
--- a/target/arm/tcg/hflags.c
+++ b/target/arm/tcg/hflags.c
@@ -261,8 +261,10 @@ static CPUARMTBFlags rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
switch (mmu_idx) {
case ARMMMUIdx_E10_1:
case ARMMMUIdx_E10_1_PAN:
- /* TODO: ARMv8.3-NV */
- DP_TBFLAG_A64(flags, UNPRIV, 1);
+ /* FEAT_NV: NV,NV1 == 1,1 means we don't do UNPRIV accesses */
+ if ((hcr & (HCR_NV | HCR_NV1)) != (HCR_NV | HCR_NV1)) {
+ DP_TBFLAG_A64(flags, UNPRIV, 1);
+ }
break;
case ARMMMUIdx_E20_2:
case ARMMMUIdx_E20_2_PAN: