diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2021-10-19 20:17:02 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair@alistair23.me> | 2021-10-22 07:47:51 +1000 |
| commit | 905b9fcde1fb84d718d95369c5d886bc81bbdd8e (patch) | |
| tree | abeb2c09531c1c579550c8bee2ad647516d269fa /target | |
| parent | 4e97d459a0f2b92815c2c2c6eb96b75e2235b42e (diff) | |
target/riscv: Replace is_32bit with get_xl/get_xlen
In preparation for RV128, replace a simple predicate
with a more versatile test.
Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20211020031709.359469-9-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/riscv/translate.c | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 77cad9bc45..d0ba54091e 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -91,15 +91,18 @@ static inline bool has_ext(DisasContext *ctx, uint32_t ext) } #ifdef TARGET_RISCV32 -# define is_32bit(ctx) true +#define get_xl(ctx) MXL_RV32 #elif defined(CONFIG_USER_ONLY) -# define is_32bit(ctx) false +#define get_xl(ctx) MXL_RV64 #else -static inline bool is_32bit(DisasContext *ctx) +#define get_xl(ctx) ((ctx)->xl) +#endif + +/* The word size for this machine mode. */ +static inline int __attribute__((unused)) get_xlen(DisasContext *ctx) { - return ctx->xl == MXL_RV32; + return 16 << get_xl(ctx); } -#endif /* The word size for this operation. */ static inline int oper_len(DisasContext *ctx) @@ -257,7 +260,7 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm) static void mark_fs_dirty(DisasContext *ctx) { TCGv tmp; - target_ulong sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD; + target_ulong sd = get_xl(ctx) == MXL_RV32 ? MSTATUS32_SD : MSTATUS64_SD; if (ctx->mstatus_fs != MSTATUS_FS) { /* Remember the state change for the rest of the TB. */ @@ -316,16 +319,16 @@ EX_SH(12) } \ } while (0) -#define REQUIRE_32BIT(ctx) do { \ - if (!is_32bit(ctx)) { \ - return false; \ - } \ +#define REQUIRE_32BIT(ctx) do { \ + if (get_xl(ctx) != MXL_RV32) { \ + return false; \ + } \ } while (0) -#define REQUIRE_64BIT(ctx) do { \ - if (is_32bit(ctx)) { \ - return false; \ - } \ +#define REQUIRE_64BIT(ctx) do { \ + if (get_xl(ctx) < MXL_RV64) { \ + return false; \ + } \ } while (0) static int ex_rvc_register(DisasContext *ctx, int reg) |