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authorMax Chou <max.chou@sifive.com>2024-03-22 01:09:27 +0800
committerMichael Tokarev <mjt@tls.msk.ru>2024-03-27 13:00:25 +0300
commitdc2abb61afe9dabca66eeb811814077f13eccee6 (patch)
tree1b7dbcab6416982ffd99abb3712d32927c38368a /target
parent6c49ccaaba96507bbee42234662fbe2ed447ce57 (diff)
target/riscv: rvv: Remove the dependency of Zvfbfmin to Zfbfmin
According to the Zvfbfmin definition in the RISC-V BF16 extensions spec, the Zvfbfmin extension only requires either the V extension or the Zve32f extension. Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240321170929.1162507-1-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> (cherry picked from commit c9b07fe14d3525cd3f2fc01f46eeb3d4ed7c3603) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target')
-rw-r--r--target/riscv/tcg/tcg-cpu.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index 8a35683a34..b437180b27 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -417,11 +417,6 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
return;
}
- if (cpu->cfg.ext_zvfbfmin && !cpu->cfg.ext_zfbfmin) {
- error_setg(errp, "Zvfbfmin extension depends on Zfbfmin extension");
- return;
- }
-
if (cpu->cfg.ext_zvfbfmin && !cpu->cfg.ext_zve32f) {
error_setg(errp, "Zvfbfmin extension depends on Zve32f extension");
return;