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authorWu Xiang <willx8@gmail.com>2017-06-21 22:21:56 +0800
committerPaolo Bonzini <pbonzini@redhat.com>2017-07-04 14:30:03 +0200
commite95e9b88ba5f4a6c17f4d0c3a3a6bf3f648bb328 (patch)
tree75c85c71f91ab69549f38273c72f531ee728fe96 /target
parent96d06835dc40007673cdfab6322e9042c4077113 (diff)
target/i386: fix interrupt CPL error when using ist in x86-64
In do_interrupt64(), when interrupt stack table(ist) is enabled and the the target code segment is conforming(e2 & DESC_C_MASK), the old implementation always set new CPL to 0, and SS.RPL to 0. This is incorrect for when CPL3 code access a CPL0 conforming code segment, the CPL should remain unchanged. Otherwise higher privileged code can be compromised. The patch fix this for always set dpl = cpl when the target code segment is conforming, and modify the last parameter `flags`, which contains correct new CPL, in cpu_x86_load_seg_cache(). Signed-off-by: Wu Xiang <willx8@gmail.com> Message-Id: <20170621142152.GA18094@wxdeubuntu.ipads-lab.se.sjtu.edu.cn> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target')
-rw-r--r--target/i386/seg_helper.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/target/i386/seg_helper.c b/target/i386/seg_helper.c
index 0374031ea2..9af69c23e0 100644
--- a/target/i386/seg_helper.c
+++ b/target/i386/seg_helper.c
@@ -931,12 +931,14 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
}
new_stack = 0;
esp = env->regs[R_ESP];
- dpl = cpl;
} else {
raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
new_stack = 0; /* avoid warning */
esp = 0; /* avoid warning */
}
+ if (e2 & DESC_C_MASK) {
+ dpl = cpl;
+ }
esp &= ~0xfLL; /* align stack */
PUSHQ(esp, env->segs[R_SS].selector);
@@ -956,7 +958,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
if (new_stack) {
ss = 0 | dpl;
- cpu_x86_load_seg_cache(env, R_SS, ss, 0, 0, 0);
+ cpu_x86_load_seg_cache(env, R_SS, ss, 0, 0, dpl << DESC_DPL_SHIFT);
}
env->regs[R_ESP] = esp;