diff options
author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-02-14 17:15:16 +0100 |
---|---|---|
committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-03-06 22:23:09 +0100 |
commit | b36e239e08a031025e52c4191198ee8381e2e6de (patch) | |
tree | f3eae7db229ea7442517a5a785a5559dbc824be9 /target | |
parent | 9295b1aa92d3efb3c08b71ee751fbfd83ea02f4d (diff) |
target: Use ArchCPU as interface to target CPU
ArchCPU is our interface with target-specific code. Use it as
a forward-declared opaque pointer (abstract type), having its
structure defined by each target.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-15-f4bug@amsat.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/alpha/cpu.h | 2 | ||||
-rw-r--r-- | target/arm/cpu.h | 2 | ||||
-rw-r--r-- | target/avr/cpu.h | 2 | ||||
-rw-r--r-- | target/cris/cpu.h | 2 | ||||
-rw-r--r-- | target/hexagon/cpu.h | 2 | ||||
-rw-r--r-- | target/hppa/cpu.h | 2 | ||||
-rw-r--r-- | target/i386/cpu.h | 2 | ||||
-rw-r--r-- | target/m68k/cpu.h | 2 | ||||
-rw-r--r-- | target/microblaze/cpu.h | 2 | ||||
-rw-r--r-- | target/mips/cpu.h | 2 | ||||
-rw-r--r-- | target/nios2/cpu.h | 2 | ||||
-rw-r--r-- | target/openrisc/cpu.h | 2 | ||||
-rw-r--r-- | target/ppc/cpu.h | 2 | ||||
-rw-r--r-- | target/riscv/cpu.h | 2 | ||||
-rw-r--r-- | target/rx/cpu.h | 2 | ||||
-rw-r--r-- | target/s390x/cpu.h | 2 | ||||
-rw-r--r-- | target/sh4/cpu.h | 2 | ||||
-rw-r--r-- | target/sparc/cpu.h | 2 | ||||
-rw-r--r-- | target/tricore/cpu.h | 2 | ||||
-rw-r--r-- | target/xtensa/cpu.h | 2 |
20 files changed, 20 insertions, 20 deletions
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 84430aff42..58f00b7814 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -257,7 +257,7 @@ typedef struct CPUArchState { * * An Alpha CPU. */ -struct AlphaCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/arm/cpu.h b/target/arm/cpu.h index af89509f5a..0b4b5bbf54 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -774,7 +774,7 @@ typedef struct ARMISARegisters ARMISARegisters; * * An ARM CPU core. */ -struct ARMCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/avr/cpu.h b/target/avr/cpu.h index a833799fc1..55497f851d 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -143,7 +143,7 @@ typedef struct CPUArchState { * * A AVR CPU. */ -struct AVRCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/cris/cpu.h b/target/cris/cpu.h index af7121bba0..e6776f25b1 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -173,7 +173,7 @@ typedef struct CPUArchState { * * A CRIS CPU. */ -struct CRISCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 8db0aa542d..2a65a57bab 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -140,7 +140,7 @@ typedef struct HexagonCPUClass { DeviceReset parent_reset; } HexagonCPUClass; -struct HexagonCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 73a3f32389..4cc936b6bf 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -213,7 +213,7 @@ typedef struct CPUArchState { * * An HPPA CPU. */ -struct HPPACPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/i386/cpu.h b/target/i386/cpu.h index d99e175e17..e11734ba86 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1707,7 +1707,7 @@ struct kvm_msrs; * * An x86 CPU. */ -struct X86CPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 76a7cc70b4..872e8ce637 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -156,7 +156,7 @@ typedef struct CPUArchState { * * A Motorola 68k CPU. */ -struct M68kCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 6e4e90a41e..0a0ce71b6a 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -339,7 +339,7 @@ typedef struct { * * A MicroBlaze CPU. */ -struct MicroBlazeCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; diff --git a/target/mips/cpu.h b/target/mips/cpu.h index c361408cc8..09e98f64de 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1171,7 +1171,7 @@ typedef struct CPUArchState { * * A MIPS CPU. */ -struct MIPSCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index e07da73df0..ca0f3420cd 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -169,7 +169,7 @@ struct CPUArchState { * * A Nios2 CPU. */ -struct Nios2CPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index bcd28802e4..bdf29d2dc4 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -297,7 +297,7 @@ typedef struct CPUArchState { * * A OpenRISC CPU. */ -struct OpenRISCCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 03bba61c8b..047b24ba50 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1275,7 +1275,7 @@ typedef struct PPCVirtualHypervisorClass PPCVirtualHypervisorClass; * * A PowerPC CPU. */ -struct PowerPCCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 2810389fdd..c069fe85fa 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -394,7 +394,7 @@ typedef struct RISCVCPUConfig RISCVCPUConfig; * * A RISCV CPU. */ -struct RISCVCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/rx/cpu.h b/target/rx/cpu.h index f81bf5b592..b4abd90ccd 100644 --- a/target/rx/cpu.h +++ b/target/rx/cpu.h @@ -105,7 +105,7 @@ typedef struct CPUArchState { * * A RX CPU */ -struct RXCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index bdf3f7d4fe..c49c8466e7 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -163,7 +163,7 @@ static inline uint64_t *get_freg(CPUS390XState *cs, int nr) * * An S/390 CPU. */ -struct S390CPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index dd477ba577..c72a30edfd 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -195,7 +195,7 @@ typedef struct CPUArchState { * * A SuperH CPU. */ -struct SuperHCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 2a7fd47da3..abb38db674 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -556,7 +556,7 @@ struct CPUArchState { * * A SPARC CPU. */ -struct SPARCCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index cd1954aa9e..108d6b8288 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -196,7 +196,7 @@ typedef struct CPUArchState { * * A TriCore CPU. */ -struct TriCoreCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index a361ab8785..4515f682aa 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -553,7 +553,7 @@ struct CPUArchState { * * An Xtensa CPU. */ -struct XtensaCPU { +struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ |