diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2022-04-26 09:30:39 -0700 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2022-04-28 13:38:16 +0100 |
commit | 9fff3fcc4c55ad4e757ed297bb0845bf6b8a6573 (patch) | |
tree | 7c42e82ce5059e2c3e19446c279d7c13d23f25b2 /target | |
parent | 2ccdf94fe7f1642def95daafb8a77585d7e9fb89 (diff) |
target/arm: Use tcg_constant in SUBR
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-44-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/translate-sve.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index fcab15a6ec..92339a19e3 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -3830,11 +3830,9 @@ static bool trans_SUBR_zzi(DisasContext *s, arg_rri_esz *a) } if (sve_access_check(s)) { unsigned vsz = vec_full_reg_size(s); - TCGv_i64 c = tcg_const_i64(a->imm); tcg_gen_gvec_2s(vec_full_reg_offset(s, a->rd), vec_full_reg_offset(s, a->rn), - vsz, vsz, c, &op[a->esz]); - tcg_temp_free_i64(c); + vsz, vsz, tcg_constant_i64(a->imm), &op[a->esz]); } return true; } |