diff options
| author | Nicholas Piggin <npiggin@gmail.com> | 2023-06-25 20:36:59 +1000 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-07-07 04:18:26 -0300 |
| commit | c32654af150191e376d2d89dba4afbb31c8e9958 (patch) | |
| tree | 0f6d83be44987a8ea1c9f59d4ee994ff2f23a519 /target | |
| parent | bc65beb3a412b3d6d7e16d9f11a9712a086aae02 (diff) | |
target/ppc: Fix icount access for some hypervisor instructions
Several instructions and register access require icount reads and are
missing translator_io_start().
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20230625103700.8992-1-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/translate.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 599bd4b4f9..4766240927 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -1187,6 +1187,7 @@ void spr_write_tfmr(DisasContext *ctx, int sprn, int gprn) void spr_write_lpcr(DisasContext *ctx, int sprn, int gprn) { + translator_io_start(&ctx->base); gen_helper_store_lpcr(cpu_env, cpu_gpr[gprn]); } #endif /* !defined(CONFIG_USER_ONLY) */ @@ -4012,6 +4013,7 @@ static void gen_doze(DisasContext *ctx) TCGv_i32 t; CHK_HV(ctx); + translator_io_start(&ctx->base); t = tcg_constant_i32(PPC_PM_DOZE); gen_helper_pminsn(cpu_env, t); /* Stop translation, as the CPU is supposed to sleep from now */ @@ -4027,6 +4029,7 @@ static void gen_nap(DisasContext *ctx) TCGv_i32 t; CHK_HV(ctx); + translator_io_start(&ctx->base); t = tcg_constant_i32(PPC_PM_NAP); gen_helper_pminsn(cpu_env, t); /* Stop translation, as the CPU is supposed to sleep from now */ @@ -4042,6 +4045,7 @@ static void gen_stop(DisasContext *ctx) TCGv_i32 t; CHK_HV(ctx); + translator_io_start(&ctx->base); t = tcg_constant_i32(PPC_PM_STOP); gen_helper_pminsn(cpu_env, t); /* Stop translation, as the CPU is supposed to sleep from now */ @@ -4057,6 +4061,7 @@ static void gen_sleep(DisasContext *ctx) TCGv_i32 t; CHK_HV(ctx); + translator_io_start(&ctx->base); t = tcg_constant_i32(PPC_PM_SLEEP); gen_helper_pminsn(cpu_env, t); /* Stop translation, as the CPU is supposed to sleep from now */ @@ -4072,6 +4077,7 @@ static void gen_rvwinkle(DisasContext *ctx) TCGv_i32 t; CHK_HV(ctx); + translator_io_start(&ctx->base); t = tcg_constant_i32(PPC_PM_RVWINKLE); gen_helper_pminsn(cpu_env, t); /* Stop translation, as the CPU is supposed to sleep from now */ @@ -4468,6 +4474,7 @@ static void gen_hrfid(DisasContext *ctx) #else /* Restore CPU state */ CHK_HV(ctx); + translator_io_start(&ctx->base); gen_helper_hrfid(cpu_env); ctx->base.is_jmp = DISAS_EXIT; #endif |