diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2020-08-18 10:22:18 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-09-01 07:41:38 -0700 |
| commit | e64b2e5cfe1a6a158f134e5bfa6c246d23ad1d9d (patch) | |
| tree | b56dc47e191184ec0a65341e8482e36ef5263f76 /target | |
| parent | 081d8e02c352861af5deb20786160fa6860e5f8e (diff) | |
target/microblaze: Convert dec_imm to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/microblaze/insns.decode | 2 | ||||
| -rw-r--r-- | target/microblaze/translate.c | 18 |
2 files changed, 11 insertions, 9 deletions
diff --git a/target/microblaze/insns.decode b/target/microblaze/insns.decode index 4644defbfe..ad15c16f9b 100644 --- a/target/microblaze/insns.decode +++ b/target/microblaze/insns.decode @@ -79,6 +79,8 @@ cmpu 000101 ..... ..... ..... 000 0000 0011 @typea idiv 010010 ..... ..... ..... 000 0000 0000 @typea idivu 010010 ..... ..... ..... 000 0000 0010 @typea +imm 101100 00000 00000 imm:16 + mul 010000 ..... ..... ..... 000 0000 0000 @typea mulh 010000 ..... ..... ..... 000 0000 0001 @typea mulhu 010000 ..... ..... ..... 000 0000 0011 @typea diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 964525f75e..54de136a16 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -477,6 +477,15 @@ static void gen_idivu(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb) DO_TYPEA_CFG(idiv, use_div, true, gen_idiv) DO_TYPEA_CFG(idivu, use_div, true, gen_idivu) +static bool trans_imm(DisasContext *dc, arg_imm *arg) +{ + dc->ext_imm = arg->imm << 16; + tcg_gen_movi_i32(cpu_imm, dc->ext_imm); + dc->tb_flags |= IMM_FLAG; + dc->clear_imm = 0; + return true; +} + static void gen_mulh(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb) { TCGv_i32 tmp = tcg_temp_new_i32(); @@ -848,14 +857,6 @@ static inline void sync_jmpstate(DisasContext *dc) } } -static void dec_imm(DisasContext *dc) -{ - dc->ext_imm = dc->imm << 16; - tcg_gen_movi_i32(cpu_imm, dc->ext_imm); - dc->tb_flags |= IMM_FLAG; - dc->clear_imm = 0; -} - static inline void compute_ldst_addr(DisasContext *dc, bool ea, TCGv t) { /* Should be set to true if r1 is used by loadstores. */ @@ -1561,7 +1562,6 @@ static struct decoder_info { } decinfo[] = { {DEC_LD, dec_load}, {DEC_ST, dec_store}, - {DEC_IMM, dec_imm}, {DEC_BR, dec_br}, {DEC_BCC, dec_bcc}, {DEC_RTS, dec_rts}, |