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authorMarc-André Lureau <marcandre.lureau@redhat.com>2022-03-23 19:57:39 +0400
committerPaolo Bonzini <pbonzini@redhat.com>2022-04-06 14:31:43 +0200
commit69242e7e7ea55f2a3f4fa50e367cad849c9cdc36 (patch)
tree70b4ad63c8071055e6595a5fbb2a9f171afabd6e /target
parent4e40e89325dc9d70f2f58217d1dea8dd1e9f3ee4 (diff)
Move CPU softfloat unions to cpu-float.h
The types are no longer used in bswap.h since commit f930224fffe ("bswap.h: Remove unused float-access functions"), there isn't much sense in keeping it there and having a dependency on fpu/. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220323155743.1585078-29-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target')
-rw-r--r--target/alpha/cpu.h1
-rw-r--r--target/arm/cpu.h1
-rw-r--r--target/hppa/cpu.h1
-rw-r--r--target/i386/cpu.h1
-rw-r--r--target/m68k/cpu.h1
-rw-r--r--target/microblaze/cpu.h2
-rw-r--r--target/openrisc/cpu.h1
-rw-r--r--target/ppc/cpu.h1
-rw-r--r--target/riscv/cpu.h2
-rw-r--r--target/rx/cpu.h1
-rw-r--r--target/s390x/cpu.h1
-rw-r--r--target/sh4/cpu.h1
-rw-r--r--target/sparc/cpu.h1
-rw-r--r--target/tricore/cpu.h1
-rw-r--r--target/xtensa/cpu.h1
15 files changed, 15 insertions, 2 deletions
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 58f00b7814..994a018b91 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
/* Alpha processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ccf635ac5c..cb5359a747 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -21,6 +21,7 @@
#define ARM_CPU_H
#include "kvm-consts.h"
+#include "qemu/cpu-float.h"
#include "hw/registerfields.h"
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 4cc936b6bf..c43b93a68f 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
/* PA-RISC 1.x processors have a strong memory model. */
/* ??? While we do not yet implement PA-RISC 2.0, those processors have
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ccf627d2c5..8422f6c18e 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -25,6 +25,7 @@
#include "kvm/hyperv-proto.h"
#include "exec/cpu-defs.h"
#include "qapi/qapi-types-common.h"
+#include "qemu/cpu-float.h"
/* The x86 has a strong memory model with some store-after-load re-ordering */
#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 872e8ce637..9b3bf7a448 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -22,6 +22,7 @@
#define M68K_CPU_H
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
#include "cpu-qom.h"
#define OS_BYTE 0
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 0a0ce71b6a..67aa88b8db 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -22,7 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#include "fpu/softfloat-types.h"
+#include "qemu/cpu-float.h"
typedef struct CPUArchState CPUMBState;
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index bdf29d2dc4..b9584f10d4 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -21,6 +21,7 @@
#define OPENRISC_CPU_H
#include "exec/cpu-defs.h"
+#include "fpu/softfloat-types.h"
#include "hw/core/cpu.h"
#include "qom/object.h"
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 627e574127..473436a49e 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -21,6 +21,7 @@
#define PPC_CPU_H
#include "qemu/int128.h"
+#include "qemu/cpu-float.h"
#include "exec/cpu-defs.h"
#include "cpu-qom.h"
#include "qom/object.h"
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index c069fe85fa..e1d976bdef 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -23,7 +23,7 @@
#include "hw/core/cpu.h"
#include "hw/registerfields.h"
#include "exec/cpu-defs.h"
-#include "fpu/softfloat-types.h"
+#include "qemu/cpu-float.h"
#include "qom/object.h"
#include "qemu/int128.h"
#include "cpu_bits.h"
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index b4abd90ccd..1c267f83bf 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -24,6 +24,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
/* PSW define */
REG32(PSW, 0)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index c49c8466e7..7d6d01325b 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -28,6 +28,7 @@
#include "cpu-qom.h"
#include "cpu_models.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
#define ELF_MACHINE_UNAME "S390X"
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index c72a30edfd..14d490ac47 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
/* CPU Subtypes */
#define SH_CPU_SH7750 (1 << 0)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index abb38db674..dd9e2f5cdb 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -4,6 +4,7 @@
#include "qemu/bswap.h"
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
#if !defined(TARGET_SPARC64)
#define TARGET_DPREGS 16
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index 108d6b8288..3b9c533a7c 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
#include "tricore-defs.h"
struct tricore_boot_info;
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index f10cfabdc3..71142ea8f4 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -29,6 +29,7 @@
#define XTENSA_CPU_H
#include "cpu-qom.h"
+#include "qemu/cpu-float.h"
#include "exec/cpu-defs.h"
#include "xtensa-isa.h"