diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2019-10-29 08:38:04 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-10-29 08:38:04 +0000 |
| commit | 8c68ff250ac3dbb63632a7e9e703c71786132147 (patch) | |
| tree | b2233f2f03aa01523f808fc668fe8dc1876ca09a /target | |
| parent | b13197b1a8b7ca201f114c4da704d3ed671228ab (diff) | |
| parent | fe9b676fb3160496b4b2bf0c57d33be724bf04c3 (diff) | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20191028' into staging
Improvements for TARGET_PAGE_BITS_VARY
Fix for TCI ld16u_i64.
Fix for segv on icount execute from i/o memory.
Two misc cleanups.
# gpg: Signature made Mon 28 Oct 2019 14:55:08 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20191028:
translate-all: Remove tb_alloc
translate-all: fix uninitialized tb->orig_tb
cputlb: Fix tlb_vaddr_to_host
exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY
exec: Promote TARGET_PAGE_MASK to target_long
exec: Restrict TARGET_PAGE_BITS_VARY assert to CONFIG_DEBUG_TCG
exec: Use const alias for TARGET_PAGE_BITS_VARY
configure: Detect compiler support for __attribute__((alias))
exec: Split out variable page size support to exec-vary.c
cpu: use ROUND_UP() to define xxx_PAGE_ALIGN
cputlb: ensure _cmmu helper functions follow the naming standard
tci: Add implementation for INDEX_op_ld16u_i64
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/cris/translate_v10.inc.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/cris/translate_v10.inc.c b/target/cris/translate_v10.inc.c index a87b8bb281..ae34a0d1a3 100644 --- a/target/cris/translate_v10.inc.c +++ b/target/cris/translate_v10.inc.c @@ -1202,8 +1202,7 @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc) case CRISV10_IND_BCC_M: cris_cc_mask(dc, 0); - imm = cpu_ldsw_code(env, dc->pc + 2); - simm = (int16_t)imm; + simm = cpu_ldsw_code(env, dc->pc + 2); simm += 4; LOG_DIS("bcc_m: b%s %x\n", cc_name(dc->cond), dc->pc + simm); |