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authorRichard Henderson <richard.henderson@linaro.org>2019-01-21 10:23:13 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-01-21 10:38:54 +0000
commite737ed2ad8c14b4b82ed241646ffa370d29d0937 (patch)
tree0a4a419c660b1661494ee4b11d42ed3ff51c0bc6 /target
parentbf0be433878935e824479e8ae890493e1fb646ed (diff)
target/arm: Add aa64_va_parameters_both
We will want to check TBI for I and D simultaneously. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190108223129.5570-22-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/arm/helper.c10
-rw-r--r--target/arm/internals.h15
2 files changed, 20 insertions, 5 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0f197d2dd1..75a6004dec 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9744,8 +9744,8 @@ static uint8_t convert_stage2_attrs(CPUARMState *env, uint8_t s2attrs)
return (hiattr << 6) | (hihint << 4) | (loattr << 2) | lohint;
}
-ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
- ARMMMUIdx mmu_idx, bool data)
+ARMVAParameters aa64_va_parameters_both(CPUARMState *env, uint64_t va,
+ ARMMMUIdx mmu_idx)
{
uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr;
uint32_t el = regime_el(env, mmu_idx);
@@ -9800,6 +9800,12 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
};
}
+ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
+ ARMMMUIdx mmu_idx, bool data)
+{
+ return aa64_va_parameters_both(env, va, mmu_idx);
+}
+
static ARMVAParameters aa32_va_parameters(CPUARMState *env, uint32_t va,
ARMMMUIdx mmu_idx)
{
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 82cf685695..acd99b579c 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -957,9 +957,9 @@ typedef struct ARMVAParameters {
} ARMVAParameters;
#ifdef CONFIG_USER_ONLY
-static inline ARMVAParameters aa64_va_parameters(CPUARMState *env,
- uint64_t va,
- ARMMMUIdx mmu_idx, bool data)
+static inline ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
+ uint64_t va,
+ ARMMMUIdx mmu_idx)
{
return (ARMVAParameters) {
/* 48-bit address space */
@@ -968,7 +968,16 @@ static inline ARMVAParameters aa64_va_parameters(CPUARMState *env,
.tbi = false,
};
}
+
+static inline ARMVAParameters aa64_va_parameters(CPUARMState *env,
+ uint64_t va,
+ ARMMMUIdx mmu_idx, bool data)
+{
+ return aa64_va_parameters_both(env, va, mmu_idx);
+}
#else
+ARMVAParameters aa64_va_parameters_both(CPUARMState *env, uint64_t va,
+ ARMMMUIdx mmu_idx);
ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx, bool data);
#endif