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author | Peter Maydell <peter.maydell@linaro.org> | 2017-11-21 10:44:44 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-11-21 10:44:44 +0000 |
commit | 1b4e6e8cf8d8ff6ba3fd71eb41051ac2621ace7e (patch) | |
tree | 70c2412a1fa690704940af86d2c71d19ee626b63 /target | |
parent | 5f49d73cb3c571e1503b86a9014d2908b2036d03 (diff) | |
parent | f516511ea84d8bb3395d6ea95a7c7b80dc2a05e9 (diff) |
Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20171120' into staging
late linux-user fixes for Qemu 2.11
# gpg: Signature made Mon 20 Nov 2017 21:19:00 GMT
# gpg: using RSA key 0xB44890DEDE3C9BC0
# gpg: Good signature from "Riku Voipio <riku.voipio@iki.fi>"
# gpg: aka "Riku Voipio <riku.voipio@linaro.org>"
# Primary key fingerprint: FF82 03C8 C391 98AE 0581 41EF B448 90DE DE3C 9BC0
* remotes/riku/tags/pull-linux-user-20171120:
linux-user: Fix calculation of auxv length
linux-user: Handle rt_sigaction correctly for SPARC
linux-user/sparc: Put address for data faults where linux-user expects it
linux-user/ppc: Report correct fault address for data faults
linux-user/s390x: Mask si_addr for SIGSEGV
linux-user: return EINVAL from prctl(PR_*_SECCOMP)
linux-user: fix 'finshed' typo in comment
linux-user/syscall.c: Handle SH4's exceptional alignment for p{read, write}64
linux-user: Handle TARGET_MAP_STACK and TARGET_MAP_HUGETLB
linux-user/hppa: Fix TARGET_F_RDLCK, TARGET_F_WRLCK, TARGET_F_UNLCK
linux-user/hppa: Fix TARGET_MAP_TYPE
linux-user/hppa: Fix typo for TARGET_NR_epoll_wait
linux-user/hppa: Fix cpu_clone_regs
linux-user/hppa: Fix TARGET_SA_* defines
linux-user: Restrict usage of sa_restorer
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/sparc/mmu_helper.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 126ea5e3ee..d5b6c1e48c 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -30,10 +30,18 @@ int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) { + SPARCCPU *cpu = SPARC_CPU(cs); + CPUSPARCState *env = &cpu->env; + if (rw & 2) { cs->exception_index = TT_TFAULT; } else { cs->exception_index = TT_DFAULT; +#ifdef TARGET_SPARC64 + env->dmmu.mmuregs[4] = address; +#else + env->mmuregs[4] = address; +#endif } return 1; } |