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authorPeter Maydell <peter.maydell@linaro.org>2020-02-14 17:50:57 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-02-21 16:07:00 +0000
commitf8af1143ef93954e77cf59e09b5e004dafbd64fd (patch)
tree62332563a07d2de02d5f146e60e5508d37dfcb82 /target
parent873b73c0c891ec20adacc7bd1ae789294334d675 (diff)
target/arm: Check aa32_pan in take_aarch32_exception(), not aa64_pan
In take_aarch32_exception(), we know we are dealing with a CPU that has AArch32, so the right isar_feature test is aa32_pan, not aa64_pan. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200214175116.9164-3-peter.maydell@linaro.org
Diffstat (limited to 'target')
-rw-r--r--target/arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 9c02d5d6b8..ad2bfa9ef8 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8858,7 +8858,7 @@ static void take_aarch32_exception(CPUARMState *env, int new_mode,
env->elr_el[2] = env->regs[15];
} else {
/* CPSR.PAN is normally preserved preserved unless... */
- if (cpu_isar_feature(aa64_pan, env_archcpu(env))) {
+ if (cpu_isar_feature(aa32_pan, env_archcpu(env))) {
switch (new_el) {
case 3:
if (!arm_is_secure_below_el3(env)) {