diff options
author | Luis Pires <luis.pires@eldorado.org.br> | 2021-10-29 17:23:58 -0300 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2021-11-09 10:32:51 +1100 |
commit | f356b3ba4745d892156931ba7c82067c4a9c18ab (patch) | |
tree | 96023b3ec912bf2e663c7dbfc06aec701ec50edd /target | |
parent | 82be6e02b480b2c7427b0ab91f2c297717d3cfa6 (diff) |
target/ppc: Implement cnttzdm
Implement the following PowerISA v3.1 instruction:
cnttzdm: Count Trailing Zeros Doubleword Under Bit Mask
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211029202424.175401-9-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target')
-rw-r--r-- | target/ppc/insn32.decode | 1 | ||||
-rw-r--r-- | target/ppc/translate/fixedpoint-impl.c.inc | 28 |
2 files changed, 25 insertions, 4 deletions
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index eb3383c99c..ee8c90d520 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -125,6 +125,7 @@ ADDPCIS 010011 ..... ..... .......... 00010 . @DX CFUGED 011111 ..... ..... ..... 0011011100 - @X CNTLZDM 011111 ..... ..... ..... 0000111011 - @X +CNTTZDM 011111 ..... ..... ..... 1000111011 - @X ### Float-Point Load Instructions diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index c9e9ae35df..d3dc0a474e 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -415,7 +415,7 @@ static bool trans_CFUGED(DisasContext *ctx, arg_X *a) } #if defined(TARGET_PPC64) -static void do_cntlzdm(TCGv_i64 dst, TCGv_i64 src, TCGv_i64 mask) +static void do_cntzdm(TCGv_i64 dst, TCGv_i64 src, TCGv_i64 mask, bool trail) { TCGv_i64 tmp; TCGLabel *l1; @@ -424,12 +424,20 @@ static void do_cntlzdm(TCGv_i64 dst, TCGv_i64 src, TCGv_i64 mask) l1 = gen_new_label(); tcg_gen_and_i64(tmp, src, mask); - tcg_gen_clzi_i64(tmp, tmp, 64); + if (trail) { + tcg_gen_ctzi_i64(tmp, tmp, 64); + } else { + tcg_gen_clzi_i64(tmp, tmp, 64); + } tcg_gen_brcondi_i64(TCG_COND_EQ, tmp, 0, l1); tcg_gen_subfi_i64(tmp, 64, tmp); - tcg_gen_shr_i64(tmp, mask, tmp); + if (trail) { + tcg_gen_shl_i64(tmp, mask, tmp); + } else { + tcg_gen_shr_i64(tmp, mask, tmp); + } tcg_gen_ctpop_i64(tmp, tmp); gen_set_label(l1); @@ -443,7 +451,19 @@ static bool trans_CNTLZDM(DisasContext *ctx, arg_X *a) REQUIRE_64BIT(ctx); REQUIRE_INSNS_FLAGS2(ctx, ISA310); #if defined(TARGET_PPC64) - do_cntlzdm(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]); + do_cntzdm(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb], false); +#else + qemu_build_not_reached(); +#endif + return true; +} + +static bool trans_CNTTZDM(DisasContext *ctx, arg_X *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_INSNS_FLAGS2(ctx, ISA310); +#if defined(TARGET_PPC64) + do_cntzdm(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb], true); #else qemu_build_not_reached(); #endif |