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authorRichard Henderson <richard.henderson@linaro.org>2019-12-10 12:27:21 -0800
committerRichard Henderson <richard.henderson@linaro.org>2020-01-15 15:13:10 -1000
commit5a376e4f40a76d8bea5426cdc7ac16c7d0a7166b (patch)
treecffcf73ecf1d46c751d60f4ba378854d23ab71f3 /target
parented53a636e877983dac8f78cf479db2d07555a3f6 (diff)
target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
There are only two uses. Within dcbz_common, the local variable mmu_idx already contains the epid computation, and we can avoid repeating it for the store. Within helper_icbiep, the usage is trivially expanded using PPC_TLB_EPID_LOAD. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/ppc/cpu.h2
-rw-r--r--target/ppc/mem_helper.c11
2 files changed, 2 insertions, 11 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 103bfe9dc2..8ebeaba649 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -951,8 +951,6 @@ struct ppc_radix_page_info {
* + real/paged mode combinations. The other two modes are for
* external PID load/store.
*/
-#define MMU_MODE8_SUFFIX _epl
-#define MMU_MODE9_SUFFIX _eps
#define PPC_TLB_EPID_LOAD 8
#define PPC_TLB_EPID_STORE 9
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index 1351b53f28..56855f2381 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_helper.c
@@ -177,14 +177,7 @@ static void dcbz_common(CPUPPCState *env, target_ulong addr,
} else {
/* Slow path */
for (i = 0; i < dcbz_size; i += 8) {
- if (epid) {
-#if !defined(CONFIG_USER_ONLY)
- /* Does not make sense on USER_ONLY config */
- cpu_stq_eps_ra(env, addr + i, 0, retaddr);
-#endif
- } else {
- cpu_stq_data_ra(env, addr + i, 0, retaddr);
- }
+ cpu_stq_mmuidx_ra(env, addr + i, 0, mmu_idx, retaddr);
}
}
}
@@ -216,7 +209,7 @@ void helper_icbiep(CPUPPCState *env, target_ulong addr)
#if !defined(CONFIG_USER_ONLY)
/* See comments above */
addr &= ~(env->dcache_line_size - 1);
- cpu_ldl_epl_ra(env, addr, GETPC());
+ cpu_ldl_mmuidx_ra(env, addr, PPC_TLB_EPID_LOAD, GETPC());
#endif
}