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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-04-13 18:10:00 +0200
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-05-29 09:35:14 +0200
commitbe73ef6423fbe1f06c912a67d6d066d257c11e18 (patch)
tree3f11946714ce90bd82620b4256ad31f283251683 /target
parent0a22f8cf3ec1716865d635688fbfb31402c0ba7a (diff)
target-microblaze: Setup for 64bit addressing
Setup MicroBlaze builds for 64bit addressing. No functional change since the translator does not yet emit 64bit addresses. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target')
-rw-r--r--target/microblaze/cpu.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 215f42b384..b631b7dc4c 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -23,7 +23,7 @@
#include "qemu-common.h"
#include "cpu-qom.h"
-#define TARGET_LONG_BITS 32
+#define TARGET_LONG_BITS 64
#define CPUArchState struct CPUMBState
@@ -340,8 +340,8 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo,
/* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */
#define TARGET_PAGE_BITS 12
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
-#define TARGET_VIRT_ADDR_SPACE_BITS 32
+#define TARGET_PHYS_ADDR_SPACE_BITS 64
+#define TARGET_VIRT_ADDR_SPACE_BITS 64
#define CPU_RESOLVING_TYPE TYPE_MICROBLAZE_CPU