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authorRichard Henderson <richard.henderson@linaro.org>2017-11-07 15:55:46 +0100
committerCornelia Huck <cohuck@redhat.com>2017-11-09 10:36:06 +0100
commitfdaae351435147b9be6161d0f136ca7c40308059 (patch)
treeabab7b6f5463cac829eb7a15d801280c9cdab0ca /target
parent2c28c490571f61fe8a01e048e5114ad6c08d80a0 (diff)
target/s390x: Finish implementing RISBGN
We added the entry to insn-data.def, but failed to update op_risbg to match. No need to special-case the imask inversion, since that is already ~0 for RISBG (and now RISBGN). Fixes: 375ee58bedcda359011fe7fa99e0647f66f9ffa0 Fixes: https://bugs.launchpad.net/qemu/+bug/1701798 (s390x part) Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20171107145546.767-1-richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'target')
-rw-r--r--target/s390x/translate.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index dee72a787d..85d0a6c3af 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3432,6 +3432,7 @@ static ExitStatus op_risbg(DisasContext *s, DisasOps *o)
/* Adjust the arguments for the specific insn. */
switch (s->fields->op2) {
case 0x55: /* risbg */
+ case 0x59: /* risbgn */
i3 &= 63;
i4 &= 63;
pmask = ~0;
@@ -3447,7 +3448,7 @@ static ExitStatus op_risbg(DisasContext *s, DisasOps *o)
pmask = 0x00000000ffffffffull;
break;
default:
- abort();
+ g_assert_not_reached();
}
/* MASK is the set of bits to be inserted from R2.
@@ -3464,11 +3465,7 @@ static ExitStatus op_risbg(DisasContext *s, DisasOps *o)
insns, we need to keep the other half of the register. */
imask = ~mask | ~pmask;
if (do_zero) {
- if (s->fields->op2 == 0x55) {
- imask = 0;
- } else {
- imask = ~pmask;
- }
+ imask = ~pmask;
}
len = i4 - i3 + 1;