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authorRichard Henderson <richard.henderson@linaro.org>2021-12-17 17:57:16 +0100
committerCédric Le Goater <clg@kaod.org>2021-12-17 17:57:16 +0100
commit41ae890d08b2254da02c2b422a85cbb9d38843df (patch)
tree09c6e41a7540e892663a84cdbf4c00f542cc95ef /target
parentd04ca895dc7fec3a5d6e5a017093f807d47ce141 (diff)
target/ppc: Add helper for fsqrts
Use float64r32_sqrt. Fixes a double-rounding issue with performing the compuation in float64 and then rounding afterward. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211119160502.17432-30-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target')
-rw-r--r--target/ppc/fpu_helper.c12
-rw-r--r--target/ppc/helper.h1
-rw-r--r--target/ppc/translate/fp-impl.c.inc3
3 files changed, 14 insertions, 2 deletions
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 12dd889fb5..07e1695b07 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -775,6 +775,18 @@ float64 helper_fsqrt(CPUPPCState *env, float64 arg)
return ret;
}
+/* fsqrts - fsqrts. */
+float64 helper_fsqrts(CPUPPCState *env, float64 arg)
+{
+ float64 ret = float64r32_sqrt(arg, &env->fp_status);
+ int flags = get_float_exception_flags(&env->fp_status);
+
+ if (unlikely(flags & float_flag_invalid)) {
+ float_invalid_op_sqrt(env, flags, 1, GETPC());
+ }
+ return ret;
+}
+
/* fre - fre. */
float64 helper_fre(CPUPPCState *env, float64 arg)
{
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 8a9f2ee7ed..9d7c9a919a 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -106,6 +106,7 @@ DEF_HELPER_4(fmsubs, i64, env, i64, i64, i64)
DEF_HELPER_4(fnmadds, i64, env, i64, i64, i64)
DEF_HELPER_4(fnmsubs, i64, env, i64, i64, i64)
DEF_HELPER_2(fsqrt, f64, env, f64)
+DEF_HELPER_2(fsqrts, f64, env, f64)
DEF_HELPER_2(fre, i64, env, i64)
DEF_HELPER_2(fres, i64, env, i64)
DEF_HELPER_2(frsqrte, i64, env, i64)
diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc
index 2e3162d3e7..baa31d3431 100644
--- a/target/ppc/translate/fp-impl.c.inc
+++ b/target/ppc/translate/fp-impl.c.inc
@@ -270,8 +270,7 @@ static void gen_fsqrts(DisasContext *ctx)
t1 = tcg_temp_new_i64();
gen_reset_fpstatus();
get_fpr(t0, rB(ctx->opcode));
- gen_helper_fsqrt(t1, cpu_env, t0);
- gen_helper_frsp(t1, cpu_env, t1);
+ gen_helper_fsqrts(t1, cpu_env, t0);
set_fpr(rD(ctx->opcode), t1);
gen_compute_fprf_float64(t1);
if (unlikely(Rc(ctx->opcode) != 0)) {