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authorRichard Henderson <richard.henderson@linaro.org>2022-06-08 19:38:55 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-06-08 19:38:55 +0100
commit8b599e5c0274cd5e4a33be6a10d6cd04631a74d1 (patch)
tree77485f0d17a566335f6733a1d15c48a369b627c1 /target
parentf45ce4c35f5e0873bbbc3119eff8539610233b7e (diff)
linux-user/aarch64: Introduce sve_vq
Add an interface function to extract the digested vector length rather than the raw zcr_el[1] value. This fixes an incorrect return from do_prctl_set_vl where we didn't take into account the set of vector lengths supported by the cpu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220607203306.657998-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/arm/cpu.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index e791ffdd6b..f5af88b686 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3286,6 +3286,17 @@ static inline int cpu_mmu_index(CPUARMState *env, bool ifetch)
return EX_TBFLAG_ANY(env->hflags, MMUIDX);
}
+/**
+ * sve_vq
+ * @env: the cpu context
+ *
+ * Return the VL cached within env->hflags, in units of quadwords.
+ */
+static inline int sve_vq(CPUARMState *env)
+{
+ return EX_TBFLAG_A64(env->hflags, VL) + 1;
+}
+
static inline bool bswap_code(bool sctlr_b)
{
#ifdef CONFIG_USER_ONLY