diff options
| author | Kashyap Chamarthy <kchamart@redhat.com> | 2020-01-23 10:01:15 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-01-24 20:59:17 +0100 |
| commit | 673b0add9ea7f432f34c1c99eaa7c567012fc838 (patch) | |
| tree | 085c6d4e6508e6f2e4929e2880c237760c22f49d /target | |
| parent | e1043d674d792ff64aebae1a3eafc08b38a8a085 (diff) | |
target/i386: Add the 'model-id' for Skylake -v3 CPU models
This fixes a confusion in the help output. (Although, if you squint
long enough at the '-cpu help' output, you _do_ notice that
"Skylake-Client-noTSX-IBRS" is an alias of "Skylake-Client-v3";
similarly for Skylake-Server-v3.)
Without this patch:
$ qemu-system-x86 -cpu help
...
x86 Skylake-Client-v1 Intel Core Processor (Skylake)
x86 Skylake-Client-v2 Intel Core Processor (Skylake, IBRS)
x86 Skylake-Client-v3 Intel Core Processor (Skylake, IBRS)
...
x86 Skylake-Server-v1 Intel Xeon Processor (Skylake)
x86 Skylake-Server-v2 Intel Xeon Processor (Skylake, IBRS)
x86 Skylake-Server-v3 Intel Xeon Processor (Skylake, IBRS)
...
With this patch:
$ ./qemu-system-x86 -cpu help
...
x86 Skylake-Client-v1 Intel Core Processor (Skylake)
x86 Skylake-Client-v2 Intel Core Processor (Skylake, IBRS)
x86 Skylake-Client-v3 Intel Core Processor (Skylake, IBRS, no TSX)
...
x86 Skylake-Server-v1 Intel Xeon Processor (Skylake)
x86 Skylake-Server-v2 Intel Xeon Processor (Skylake, IBRS)
x86 Skylake-Server-v3 Intel Xeon Processor (Skylake, IBRS, no TSX)
...
Signed-off-by: Kashyap Chamarthy <kchamart@redhat.com>
Message-Id: <20200123090116.14409-1-kchamart@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/i386/cpu.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 5fa6acc34f..32efa46852 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2905,6 +2905,8 @@ static X86CPUDefinition builtin_x86_defs[] = { .props = (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, + { "model-id", + "Intel Core Processor (Skylake, IBRS, no TSX)" }, { /* end of list */ } } }, @@ -3028,6 +3030,8 @@ static X86CPUDefinition builtin_x86_defs[] = { .props = (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, + { "model-id", + "Intel Xeon Processor (Skylake, IBRS, no TSX)" }, { /* end of list */ } } }, |