diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2020-03-03 17:49:48 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-03-12 16:01:37 +0000 |
| commit | 0ea9e6583b0778568ba4c6e749f2848291e4a9b8 (patch) | |
| tree | 6f7eb8457c167d6b64a9c7adc63487e272d37e8f /target | |
| parent | 8c4985298fca616e91b88996c225a9efd04b7500 (diff) | |
target/arm: Update hflags in trans_CPS_v7m()
For M-profile CPUs, the FAULTMASK value affects the CPU's MMU index
(it changes the NegPri bit). We update the hflags after calls
to the v7m_msr helper in trans_MSR_v7m() but forgot to do so
in trans_CPS_v7m().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200303174950.3298-3-peter.maydell@linaro.org
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/translate.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index 6259064ea7..7f0154194c 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -10590,7 +10590,7 @@ static bool trans_CPS(DisasContext *s, arg_CPS *a) static bool trans_CPS_v7m(DisasContext *s, arg_CPS_v7m *a) { - TCGv_i32 tmp, addr; + TCGv_i32 tmp, addr, el; if (!arm_dc_feature(s, ARM_FEATURE_M)) { return false; @@ -10613,6 +10613,9 @@ static bool trans_CPS_v7m(DisasContext *s, arg_CPS_v7m *a) gen_helper_v7m_msr(cpu_env, addr, tmp); tcg_temp_free_i32(addr); } + el = tcg_const_i32(s->current_el); + gen_helper_rebuild_hflags_m32(cpu_env, el); + tcg_temp_free_i32(el); tcg_temp_free_i32(tmp); gen_lookup_tb(s); return true; |