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authorRichard Henderson <richard.henderson@linaro.org>2021-03-19 18:06:06 -0600
committerPeter Maydell <peter.maydell@linaro.org>2021-03-23 14:07:55 +0000
commitdad90de78e9e9d47cefcbcd30115706b98e6ec87 (patch)
tree596418cf86933adfc4e97d7216d0094305cd235b /target
parent75ce72b785a7c9fcb9af2779854142a34825da59 (diff)
target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
Pretend the fault always happens at page table level 3. Failure to set this leaves level = 0, which is impossible for ARMFault_Permission, and produces an invalid syndrome, which reaches g_assert_not_reached in cpu_loop. Fixes: 8db94ab4e5db ("linux-user/aarch64: Pass syndrome to EXC_*_ABORT") Reported-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210320000606.1788699-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/arm/tlb_helper.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index 9609333cbd..3107f9823e 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -163,6 +163,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
} else {
fi.type = ARMFault_Translation;
}
+ fi.level = 3;
/* now we have a real cpu fault */
cpu_restore_state(cs, retaddr, true);