diff options
author | Richard Henderson <rth@twiddle.net> | 2016-11-16 11:48:37 +0100 |
---|---|---|
committer | Richard Henderson <rth@twiddle.net> | 2017-01-10 08:06:11 -0800 |
commit | b79ea941d6be8b64bdfa53bd4a1c09e72fd505a8 (patch) | |
tree | 8e385f613492a79db7482a24866e81f86512c457 /target | |
parent | 03a733dc62de8bcf85bba59ac2776ed3d4adcbf1 (diff) |
target-xtensa: Use clz opcode
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target')
-rw-r--r-- | target/xtensa/helper.h | 2 | ||||
-rw-r--r-- | target/xtensa/op_helper.c | 13 | ||||
-rw-r--r-- | target/xtensa/translate.c | 13 |
3 files changed, 11 insertions, 17 deletions
diff --git a/target/xtensa/helper.h b/target/xtensa/helper.h index 5ea9c5beec..0c8adae9d4 100644 --- a/target/xtensa/helper.h +++ b/target/xtensa/helper.h @@ -3,8 +3,6 @@ DEF_HELPER_3(exception_cause, noreturn, env, i32, i32) DEF_HELPER_4(exception_cause_vaddr, noreturn, env, i32, i32, i32) DEF_HELPER_3(debug_exception, noreturn, env, i32, i32) -DEF_HELPER_FLAGS_1(nsa, TCG_CALL_NO_RWG_SE, i32, i32) -DEF_HELPER_FLAGS_1(nsau, TCG_CALL_NO_RWG_SE, i32, i32) DEF_HELPER_2(wsr_windowbase, void, env, i32) DEF_HELPER_4(entry, void, env, i32, i32, i32) DEF_HELPER_2(retw, i32, env, i32) diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 0a4b2147bc..dc25625d0d 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -161,19 +161,6 @@ void HELPER(debug_exception)(CPUXtensaState *env, uint32_t pc, uint32_t cause) HELPER(exception)(env, EXC_DEBUG); } -uint32_t HELPER(nsa)(uint32_t v) -{ - if (v & 0x80000000) { - v = ~v; - } - return v ? clz32(v) - 1 : 31; -} - -uint32_t HELPER(nsau)(uint32_t v) -{ - return v ? clz32(v) : 32; -} - static void copy_window_from_phys(CPUXtensaState *env, uint32_t window, uint32_t phys, uint32_t n) { diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 0858c296ea..5c719a4181 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -1372,14 +1372,23 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) case 14: /*NSAu*/ HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA); if (gen_window_check2(dc, RRR_S, RRR_T)) { - gen_helper_nsa(cpu_R[RRR_T], cpu_R[RRR_S]); + TCGv_i32 t0 = tcg_temp_new_i32(); + + /* if (v & 0x80000000) v = ~v; */ + tcg_gen_sari_i32(t0, cpu_R[RRR_S], 31); + tcg_gen_xor_i32(t0, t0, cpu_R[RRR_S]); + + /* r = (v ? clz(v) : 32) - 1; */ + tcg_gen_clzi_i32(t0, t0, 32); + tcg_gen_subi_i32(cpu_R[RRR_T], t0, 1); + tcg_temp_free_i32(t0); } break; case 15: /*NSAUu*/ HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA); if (gen_window_check2(dc, RRR_S, RRR_T)) { - gen_helper_nsau(cpu_R[RRR_T], cpu_R[RRR_S]); + tcg_gen_clzi_i32(cpu_R[RRR_T], cpu_R[RRR_S], 32); } break; |