diff options
| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-03-20 14:21:29 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-08-31 19:47:43 +0200 |
| commit | f703f1ef99bea3a00eb9b8c321443eab507e7e63 (patch) | |
| tree | 52a9eaf57b82000c06f9a4436740b6e659a70cbf /target | |
| parent | a7041adce08c3cbe52d70c0229cbec4167b358e3 (diff) | |
bulk: Do not declare function prototypes using 'extern' keyword
By default, C function prototypes declared in headers are visible,
so there is no need to declare them as 'extern' functions.
Remove this redundancy in a single bulk commit; do not modify:
- meson.build (used to check function availability at runtime)
- pc-bios/
- libdecnumber/
- tests/
- *.c
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20230605175647.88395-5-philmd@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/i386/sev.h | 6 | ||||
| -rw-r--r-- | target/mips/cpu.h | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/target/i386/sev.h b/target/i386/sev.h index 7b1528248a..e7499c95b1 100644 --- a/target/i386/sev.h +++ b/target/i386/sev.h @@ -46,9 +46,9 @@ bool sev_es_enabled(void); #define sev_es_enabled() 0 #endif -extern uint32_t sev_get_cbit_position(void); -extern uint32_t sev_get_reduced_phys_bits(void); -extern bool sev_add_kernel_loader_hashes(SevKernelLoaderContext *ctx, Error **errp); +uint32_t sev_get_cbit_position(void); +uint32_t sev_get_reduced_phys_bits(void); +bool sev_add_kernel_loader_hashes(SevKernelLoaderContext *ctx, Error **errp); int sev_encrypt_flash(uint8_t *ptr, uint64_t len, Error **errp); int sev_inject_launch_secret(const char *hdr, const char *secret, diff --git a/target/mips/cpu.h b/target/mips/cpu.h index f81bd06f5e..6d6af1f2a8 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1224,8 +1224,8 @@ void mips_cpu_list(void); #define cpu_list mips_cpu_list -extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env); -extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env); +void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env); +uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env); /* * MMU modes definitions. We carefully match the indices with our |