diff options
| author | Matheus Ferst <matheus.ferst@eldorado.org.br> | 2022-03-02 06:51:37 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:37 +0100 |
| commit | fb1b56752fb5e043aef98d62abbd28c036440b07 (patch) | |
| tree | 4f8030ad4901c4759e3e809638526f08ea25f385 /target | |
| parent | 08d512e1b972a8993b9ad1829d79804891e68483 (diff) | |
target/ppc: implement vclrrb
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-17-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/insn32.decode | 1 | ||||
| -rw-r--r-- | target/ppc/translate/vmx-impl.c.inc | 32 |
2 files changed, 25 insertions, 8 deletions
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 31cdbba86b..b20f1eaa8e 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -530,6 +530,7 @@ VSTRIHL 000100 ..... 00010 ..... . 0000001101 @VX_tb_rc VSTRIHR 000100 ..... 00011 ..... . 0000001101 @VX_tb_rc VCLRLB 000100 ..... ..... ..... 00110001101 @VX +VCLRRB 000100 ..... ..... ..... 00111001101 @VX # VSX Load/Store Instructions diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index d43fba00ed..4db5656669 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1940,7 +1940,7 @@ TRANS(VSTRIBR, do_vstri, gen_helper_VSTRIBR) TRANS(VSTRIHL, do_vstri, gen_helper_VSTRIHL) TRANS(VSTRIHR, do_vstri, gen_helper_VSTRIHR) -static bool trans_VCLRLB(DisasContext *ctx, arg_VX *a) +static bool do_vclrb(DisasContext *ctx, arg_VX *a, bool right) { TCGv_i64 rb, mh, ml, tmp, ones = tcg_constant_i64(-1), @@ -1954,15 +1954,28 @@ static bool trans_VCLRLB(DisasContext *ctx, arg_VX *a) tcg_gen_extu_tl_i64(rb, cpu_gpr[a->vrb]); tcg_gen_andi_i64(tmp, rb, 7); tcg_gen_shli_i64(tmp, tmp, 3); - tcg_gen_shl_i64(tmp, ones, tmp); + if (right) { + tcg_gen_shr_i64(tmp, ones, tmp); + } else { + tcg_gen_shl_i64(tmp, ones, tmp); + } tcg_gen_not_i64(tmp, tmp); - tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(8), - tmp, ones); - tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(8), - zero, tmp); - tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(16), - mh, ones); + if (right) { + tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(8), + tmp, ones); + tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(8), + zero, tmp); + tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(16), + ml, ones); + } else { + tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(8), + tmp, ones); + tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(8), + zero, tmp); + tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(16), + mh, ones); + } get_avr64(tmp, a->vra, true); tcg_gen_and_i64(tmp, tmp, mh); @@ -1980,6 +1993,9 @@ static bool trans_VCLRLB(DisasContext *ctx, arg_VX *a) return true; } +TRANS(VCLRLB, do_vclrb, false) +TRANS(VCLRRB, do_vclrb, true) + #define GEN_VAFORM_PAIRED(name0, name1, opc2) \ static void glue(gen_, name0##_##name1)(DisasContext *ctx) \ { \ |